Battery saving system for a frequency synthesizer

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 14, 331 25, 331186, 455 76, 455343, H03L 718, H04B 140

Patent

active

046314962

ABSTRACT:
A frequency synthesized transceiver capable of tuning to a plurality of communication channels is disclosed. The transceiver includes a receiver and a transmitter section which are coupled to the synthesizer which generates the appropriate injection signals to achieve tuning. A battery saving circuit generates a battery saving signal having a predetermined duty cycle and period and is responsive to the phase detector in the synthesizer to disrupt power to the synthesizer while maintaining precise tuning. The battery saver circuit is also responsive to the transceiver. In a normal receive operation, a battery saving circuit synchronizes its battery saving signal with the hold condition of the phase detector to disrupt power to selected modules in the synthesizer without altering the injection frequency of the receiver. In a standby mode, power is disrupted to all modules in the receiver, the selected modules in the phase locked loop and the voltage controlled oscillator. During a transmit mode all battery saving is terminated.

REFERENCES:
patent: 2884518 (1959-04-01), O'Neill
patent: 3488596 (1970-01-01), Webster et al.
patent: 3611156 (1971-10-01), Ward
patent: 4179670 (1979-12-01), Kingsbury
patent: 4194153 (1980-03-01), Masaki et al.
patent: 4521918 (1985-06-01), Challen

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