Battery saving signal generating circuit

Telecommunications – Receiver or analog modulated signal frequency converter – With particular receiver circuit

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Details

34082544, 307265, 307269, 307296A, 3072471, 3281291, H04B 116, H03K 301, H03K 3017, G01R 2902

Patent

active

046913823

ABSTRACT:
A battery saving signal generating circuit for saving energy of a battery assembled in a paging receiver. The signal generating circuit comprises a first circuit including a frequency divider operative to produce a first timing signal for determination of a time duration of each time slot pulse, a second circuit including a frequency divider operable independent of the first circuit to produce a second timing signals for determination of an occurrence interval of each time slot pulse. The signal generating circuit further comprises a third circuit responsive to the first and second timing signals to produce a time slot pulse signal. With this signal generating circuit, it is possible to independently and desirably select a time duration TW of the BSS time slot and a timing interval TD of the time slot occurrence, resulting in improvement in adaptability to paging receivers where different preamble signal lengths are required.

REFERENCES:
patent: 3614632 (1971-10-01), Leibowitz
patent: 3959731 (1976-05-01), Pomerantz et al.
patent: 3989960 (1976-11-01), Kodama
patent: 4034236 (1977-07-01), Aveneau et al.
patent: 4236114 (1980-11-01), Sasaki
patent: 4282488 (1981-08-01), Norman et al.
patent: 4330751 (1982-05-01), Swain
patent: 4523332 (1985-06-01), Mori

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