Battery backup bus scheme for an ECL BiCMOS SRAM

Details Battery backup bus scheme for an ECL BiCMOS SRAM Battery backup bus scheme for an ECL BiCMOS SRAM

1988-02-16

1991-01-08

Fears, Terrell W.

Static information storage and retrieval

Powering

Data preservation

36518901, G11C 1300

Patent

active

049842110

ABSTRACT:
A static random access memory is disclosed which has a first power supply terminal for receiving a power supply voltage for powering the periphery of the device and the array, and which has a second power supply terminal for receiving a power supply voltage for powering the array only. A diode may be connected between the two terminals to effect the biasing of the array from the first power supply terminal but not from the second power supply terminal. The memory may be incorporated into a system which has a power fail detector for controlling a switch, so that the battery is connected to the second power supply terminal when the main power supply has failed, but so that the main power supply is connected thereto when operable.

REFERENCES:
patent: 4710905 (1987-12-01), Uchida
patent: 4740918 (1988-04-01), Okajima
patent: 4754167 (1988-06-01), Conkle et al.
patent: 4771407 (1988-09-01), Takemae et al.

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