Multiplex communications – Wide area network – Packet switching
Patent
1991-02-12
1992-07-14
Safourek, Benedict V.
Multiplex communications
Wide area network
Packet switching
370 941, H04J 302
Patent
active
051309769
ABSTRACT:
A 2.times.2 Batcher switching element (18) and a 2.times.2 banyan switching element (19) are formed utilizing dynamic charge storage devices (DL1, DL2, ILD0) and pipelined processing (100, 300). This enables the Batcher and banyan switching elements to be fast enough to switch data cells which are transmitted using the Asynchronous Transfer Mode.
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"Principles of CMOS VLSI Design", N. H. E. Weste & K. Eshrghian, Addison Wesley, Reading, Mass., pp. 439, 1985.
Hickey Jason J.
Marcus William S.
Bell Communications Research Inc.
Blum Russell W.
Falk James W.
Safourek Benedict V.
Suchyta Leonard Charles
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