Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
1998-06-17
2001-04-24
Patel, Nimeshkumar D. (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S585000, C313S491000, C313S587000
Reexamination Certificate
active
06222316
ABSTRACT:
BACKGROUND OF THE INVENTION
A. Field of the Invention
The present invention relates to a barrier structure of a plasma display panel and, particularly, to a barrier structure formed on a substrate in order to define a space for discharges.
B. Discussion of Related Art
A typical color PDP (Plasma Display Panel), as shown in
FIG. 1
, has upper and lower structures. The upper structure, which is viewed the side for better understanding, consists of upper substrate
1
, dielectric layer
5
for sustaining surface charges formed during a discharge of the sustain electrodes
3
, a protection layer
6
, and upper barriers
9
. The lower structure consists of lower substrate
2
, lower electrodes
4
formed on the lower substrate
2
perpendicular to the sustain electrodes
3
, lower barriers
7
formed between the upper and lower substrates
1
and
2
in parallel with the lower electrodes
4
, and phosphor
8
coated on the surface of the lower barriers
7
.
The space between the upper and lower structures is sealed with inert gas contained therein, forming a discharging area.
Initially, when a high voltage is applied sufficient to cause discharges in all discharging cells on the panel between both ends of the sustain electrodes
3
, the charges formed on the surfaces of the barriers
7
and
9
and the dielectric layer
5
are eliminated and charges are thereby distributed uniformly all over the discharging cells. As a result, the inner surface of the discharging area has no charge formation.
In the subsequent addressing step, cells to be discharged are supplied with an address voltage, causing a discharge between the lower electrodes
4
and the sustain electrodes
3
that are energized by a scan voltage, thus forming wall charges on the surface of the protection layer
6
.
A sustain voltage is then applied between the sustain electrodes
3
during a sustain period so as to sustain the discharges in the cells having wall charges. Discharges cannot continue in the cells that have no wall charges formed thereon, when sustain voltage is supplied.
However, as shown in
FIG. 2
, a discharging voltage applied to both ends of transparent electrode lines a and a′ out of sustain electrodes
3
causes a cooperative surface discharge in the discharging area. Bus electrode lines b and b′ are formed on the transparent electrode lines a and a′, respectively, to prevent a voltage drop that may be caused by the resistance of the transparent electrode lines a and a′. Unfortunately, an excessive discharging current generated at this stage can damage the electrodes.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a barrier structure of a plasma display panel that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a barrier structure of a plasma display panel that prevents an excessive increase of discharging current during a supply of discharging voltage by forming a barrier between the bus electrodes of adjacent cells of the upper substrate and having both ends of the barrier being in contact with the bus electrodes.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
A plasma display panel in accordance with one embodiment of this invention includes a first substrate; a second substrate spaced a distance from the first substrate; a plurality of sustain electrodes arranged in parallel with one another on the first substrate; a plurality of data electrodes arranged on the second substrate substantially perpendicular to the sustain electrodes; and a barrier on the first substrate and projected toward the second substrate, the barrier having at least one side contacting at least one sustain electrode.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5717292 (1998-02-01), Jin et al.
patent: 5834896 (1998-11-01), Hayashi et al.
patent: 5914563 (1999-06-01), Lee et al.
patent: 5952782 (1999-09-01), Nanto et al.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Guharay Karabi
LG Electronics Inc.
Patel Nimeshkumar D.
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