Barrier layer for copper metallization in integrated circuit...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S752000, C257S762000, C257S764000

Reexamination Certificate

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06747353

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention is in the field of integrated circuit fabrication, and is more specifically directed to the formation of metal conductor layers in integrated circuits.
For many years, aluminum metallization has been widely used in the fabrication of conductors in conventional integrated circuits. Aluminum metallization, either pure or doped with silicon, copper, or other impurities, has been used in the manufacture of integrated circuits, particularly because of its ease of deposition and ease of patterning and etching, while providing interconnections of reasonable conductivity. However, the use of aluminum necessitates subsequent manufacturing processes to be maintained at relatively low temperatures, given the low melting temperature of aluminum and also its reactivity with other materials, such as silicon.
Copper has been an attractive material for the realization of integrated circuit conductors for such time, due to its much higher conductivity than aluminum. This higher conductivity has become even more important with the ever-decreasing conductor line widths necessary to achieve the maximum integrated circuit device density, and minimum chip area. Additionally, copper is more stable, in the electromigration sense, than is aluminum; indeed, as noted above, aluminum metallization is doped with copper for this very reason. Copper metallization is thus able to withstand higher current densities than aluminum. As such, the use of copper conductors in integrated circuits has enabled reduced conductor feature sizes from that possible for aluminum.
However, as is also well known in the art, copper atoms diffuse very rapidly in silicon. Once diffused into silicon, copper ions operate as recombination sites, destroying the functionality of conventional metal-oxide-semiconductor (MOS) transistors. Adequate barriers between copper metallization and the underlying silicon have therefore become essential, especially in MOS devices, to obtain the important benefits of copper metallization.
As is well known in the art, barrier layers are formed to underlie copper conductors and via plugs in conventional integrated circuits. These barrier layers are typically formed of metal, or metal compounds, so as to be electrically conductive. Barrier layer conductivity is particularly important at those locations where the copper conductors make contact to underlying conductor layers, contact plugs, and underlying silicon, as the barrier layer is effectively in series between the copper conductor and the underlying feature.
Another use of barrier material in conventional integrated circuits appears in ferroelectric memory capacitors. Typically, barrier materials are provided on either side of the ferroelectric material, primarily to prevent the diffusion of oxygen from the ferroelectric material (e.g., PZT) into contact plugs. Such oxygen diffusion into the contact plugs has the effect of degrading contact resistance, as described in Onishi, et al., “A Half-Micron Ferroelectric Memory Cell Technology with Stacked Capacitor Structure”,
Technical Digest, Int'l Electron Devices Meeting
, paper 32.4.1 (IEEE, 1994).
According to conventional technology, tradeoffs between diffusion barrier effectiveness and barrier layer conductivity have been required. For example, crystalline materials such as TiN have good conductivity, but provide relatively weak diffusion barriers. On the other hand, amorphous films of refractory metal nitrides (e.g., amorphous TaN), and of silicon-nitride refractory metal compounds (e.g., amorphous films of TaSiN and WSiN) are excellent diffusion barrier materials, but are quite resistive relative to the crystalline films such as TiN.
Based on the foregoing, it has been observed that the diffusion barrier property of barrier materials relates strongly to its crystalline structure, with the barrier property increasing with the degree to which the film is amorphous. It has also been observed, according to the present invention, that the amorphous structure of conventional refractory metal silicon-nitride compounds is strongly affected by the composition ratio of the non-metallic elements in the compound. For example, amorphous TaSiN has a relatively high silicon composition ratio, while amorphous TaN has a very large nitrogen composition ratio. However, these high silicon and nitrogen composition ratios are also reflected in very high resistivities.
FIG. 1
illustrates the relationship between silicon composition ratio in a TaSiN film, and its resistivity, plotted over various partial pressures of N
2
during the deposition, and thus over various composition ratios of nitrogen in the eventual film. These films, and their corresponding plots of
FIG. 1
, are formed according to conventional processing methods. Plot
2
corresponds to a partial nitrogen pressure of 8% of the total pressure in the sputtering apparatus. Preferably, only nitrogen and argon gases are present in the sputtering apparatus, in which case the partial nitrogen pressure is derived relative to the sum of the nitrogen and argon pressures. In the example of
FIG. 1
, plots
4
,
6
,
8
correspond to partial nitrogen pressures of 12%, 20%, and 30%, respectively. Each plot of
FIG. 1
illustrates a knee in the resistivity curve at a silicon composition ratio of about 15%, below the crystal-to-amorphous transition of about 22%; at these knees, the resistivity of the film sharply increases, regardless of the nitrogen composition. Of course, as evident from a comparison of plots
2
,
4
,
6
,
8
, the resistivity of the resulting TaSiN films increases with higher partial nitrogen pressures, and thus with correspondingly higher nitrogen composition ratios in the eventual film.
In each case, according to conventional technology, amorphous films that are suitable for use as a diffusion barrier have exhibited high resistivity. For example, a common barrier material for copper is sputtered Ta
36
Si
14
N
50
, in amorphous form. This film is an excellent diffusion barrier, as described in Kolawa, et al., “Sputtered Ta—Si—N Diffusion Barriers in Cu Metallizations for Si”,
IEEE Electron Device Letters
, Vol. 12, No. 6 (June 1991), pp. 321-323; and in Kim, et al., “Nanostructured Ta—Si—N diffusion barriers for Cu metallization”,
J. Appl. Phys
., Vol. 82, No. 10 (November 1997), pp. 4847-4851. Similarly, sputtered TaSiN has been used as a barrier to oxygen diffusion, as described in Hara, et al., “Barrier Effect of TaSiN Layer for Oxygen Diffusion”,
J. Electrochem. Soc
., Vol. 143, No. 11 (November 1996), pp. L264-266. However, such films have been observed to exhibit a high resistivity, such as about 625 &mgr;&OHgr;-cm, as described in Reid, et al., “Amorphous (Mo, Ta, or W)—Si—N diffusion barriers for Al metallizations”,
J. App. Phys
., Vol. 79, No. 2 (January 1996), pp. 1109-1115. This high resistivity can be a limiting factor in the performance of the copper metallization level, and thus in the performance of the overall integrated circuit.
BRIEF SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an integrated circuit having a conductive but effective barrier layer.
It is a further object of the present invention to provide a method of manufacturing an integrated circuit having such a barrier layer underlying copper conductors.
It is a further object of the present invention to provide such a structure and method of manufacturing the same having such a barrier layer used in a ferroelectric memory capacitor.
It is a further object of the present invention to provide such an integrated circuit and method in which the barrier layer may be readily formed using existing equipment.
Other objects and advantages of the present invention will be apparent to those of ordinary skill in the art having reference to the following specification together with its drawings.
The present invention may be implemented into the manufacture of integrated circuits. A barrier layer of tantalum silicon nitride is formed to have relatively low silicon and nitrogen composition r

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