Barrier enhancement at the salicide layer

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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437192, 437200, H01L 2348

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active

054122503

ABSTRACT:
An improved barrier, and a method for forming such a barrier, between a semiconductor substrate and a metallized contact. A first metallic layer is deposited over the substrate and the contact well formed therein. The first metallic layer is then exposed to a gas to allow the gas to stuff the first metallic layer, thereby improving the barrier characteristics of the first metallic layer. A second metallic layer is deposited over the first stuffed metallic layer. A third metallic layer is then deposited over the second metallic layer. An anti-reflective fourth layer of metal is then deposited over the third metallic layer. The exposure of the first metallic layer to a gas and all of the metal layer deposition steps are performed in a low-pressure environment. Therefore, the present invention eliminates the need for time-consuming pressure breaks. As a result, the throughput of the present invention is substantially increased over prior art barrier formation processes. Also, as a result of subsequent processing steps required in the formation of semiconductor devices, the portions of the first metallic layer which are present outside of the contact well are removed. The remaining portion of the first metallic layer forms a self-aligned silicide within the contact well. Thus, the present invention eliminates the need for a separate etch step to remove unwanted portions of the first metallic layer, and also provides a self-aligned silicide without requiring a separate heating or sinter step.

REFERENCES:
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patent: 5350948 (1994-09-01), Maehara
J. Coniff et al. "A universal underlayer for Al and W Interconnects" Advanced Metallization for ULSI Applications, Proc. of Conf. Oct. 1991 pp. 293-296 (Abstract).

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