Bandgap reference circuit

Details Bandgap reference circuit Bandgap reference circuit

2003-02-05

2004-11-09

Sterrett, Jeffrey (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C323S316000, C323S901000

Reexamination Certificate

active

06815941

ABSTRACT:

FIELD OF THE INVENTION
The field of the present invention is related to integrated circuit reference voltage generator circuits and more particularly to bandgap voltage generator circuits.
BACKGROUND OF THE INVENTION
A voltage level independent of temperature, supply voltage and process variations, or reference voltage, is desirable for many integrated circuit applications. A well known method of generating such a reference voltage is referred to as a “bandgap reference” since this circuit relies on the bandgap of silicon as the basis for the reference voltage.
The bandgap of silicon determines both the voltage drop across a forward biased diode and the slope of the current-voltage curve of a forward biased diode. These values are predictable and are not subject to process variations and are thus suitable for a generating a generally stable reference voltage.
The voltage drop across a forward biased diode decreases as the temperature of the diode increases. The voltage increase required for increasing the current flowing through a diode by a factor of ten increases as the temperature increases. A bandgap reference voltage generator is able to achieve a constant voltage as temperature changes by offsetting one of these effects with the other. To offset one diode drop's voltage variation with temperature, the voltage variation caused by about a 10
10.5
change in current must be used. Diodes are not typically linear over so large a current change so methods that multiply a current change value are usually used.
A bandgap circuit can be achieved by using a current-voltage mirror to force the same current and voltage into legs one and two of a circuit and a current mirror to force the same current into a third leg of a circuit. The first leg of the circuit is a diode forward biased to ground, the second leg of the circuit is a resistor in series with a forward biased diode to ground, the diode in the second leg being ten times the size of the diode in the first leg. The voltage developed across the resistor is a function of only the slope of the forward biased diode current-voltage curve assuming the current voltage mirror functions perfectly. The third leg of the circuit is a resistor in series with a forward biased diode to ground. The resistor in the third leg has about 10.5× the resistance of the resistor in the second leg and the diode in the third leg is the same as the diode in the first leg. The voltage across the third leg is a temperature, process and supply voltage independent voltage, assuming that the current-voltage mirror and current mirror function independently of temperature, process and supply voltage variations.
Referring now to
FIG. 1
, a combined block and schematic diagram of prior art bandgap reference voltage circuit
10
is shown. In the circuit
10
of
FIG. 1
, PMOS transistors
127
,
129
and
131
are identical. PMOS transistors
127
and
129
form a current mirror circuit that is coupled with NMOS transistors
128
and
130
that form a modified current mirror circuit (note that the source are not coupled together) in order to form a “current-voltage” mirror circuit
12
as shown. Transistor
131
is a current mirror portion
14
for mirroring the current flowing in PMOS transistors
127
and
129
.
PNP bipolar transistors
111
and
113
are identical in terms of emitter area. Note that transistors
111
,
112
, and
113
are all diodes formed using diode-connected transistors wherein the collector is shorted to the base of the transistor as is known in the art. PNP bipolar transistor
112
has 10× the emitter area or alternately is ten transistors identical to transistor
111
wired in parallel.
The current-voltage mirror forces the current through
111
to be equal to the current through
112
. The current-voltage mirror also forces the source voltage of 130 to be equal to the source voltage of
128
. Such current-voltage mirror circuits depend on the transistors thereof to be operating in saturation as transistors operating in saturation conduct current substantially independent of the source to drain voltage. A 60 K ohm resistor is coupled in series between transistor
112
and the current-voltage mirror circuit
12
and a 630K ohm resistor is coupled in series between transistor
113
and the current mirror portion
14
.
A capacitor
181
is coupled to the VREG output voltage. The capacitor is formed using an NMOS transistor
181
configured in a capacitor-connected configuration in which the gate forms the one electrode of the capacitor and the coupled source and drain forms the other electrode of the capacitor as is known in the art.
The voltage drop across diode
111
is equal to the voltage drop across diode
112
plus the voltage drop across resistor
160
. The current through diode
111
is equal to the current through diode
112
but since the size of diode
112
is ten times larger than diode
111
, the current density is ten times higher in diode
111
than in diode
112
. Therefore, the voltage drop across diode
111
is higher than the voltage drop across diode
112
by an amount that is equivalent to a factor of ten current change. This difference in the voltage drop across diodes
111
and
112
increases as temperature increases and is therefore referred to as a Voltage Proportional To Absolute Temperature or VPTAT. It also follows that the voltage drop across resistor
160
is also a VPTAT.
Transistor
131
acts as a portion
14
of a current mirror in conjunction with the current-voltage mirror circuit
12
and attempts to force the same current through diode
113
as is being forced by the current-voltage mirror circuit
12
through diodes
111
and diode
112
. To the extent that the currents through diodes
111
,
112
and
113
are matched, the voltage drop across resistor
170
is 10.5×VPTAT. The voltage drop across diode
113
is a forward biased diode voltage. The output reference voltage at the drain of transistor
131
is designated “VBG” (for BandGap Voltage) and is the sum of the two voltages and is therefore relatively independent of temperature as the change of voltage of a diode drop is approximately equal to the change of voltage of 10.5×VPTAT but opposite in sign.
Differential amplifier
16
controls the gate of PMOS transistor
126
so that the output reference voltage VREG is regulated to the voltage at which the gate voltage of 128/129 is equal to the gate voltage of 128/130. This assures that PMOS transistors
127
and
129
are operating at substantially identical voltage conditions and VBG variations are eliminated due to increasing the VCCX supply voltage above this regulation point.
It can be seen that VREG output voltage is controlled to PVt+NVt+ a forward biased diode drop, wherein PVt is the threshold voltage of a PMOS transistor and NVt is the threshold voltage of an NMOS transistor. As NVt and PVt decrease, VREG approaches VBG, reducing the VDS across transistor
131
. In the extreme case of very low NVt and PVt, VREG can be below the desired VBG reference voltage resulting in an undesirable VBG variation with NVt and PVt.
Referring now to
FIG. 4
, the undesirable variations in the VBG voltage with respect to the VCCX power supply voltage are shown, plotted at several different temperature and operating conditions. The SPICE simulation results for the bandgap reference voltage circuit
10
are shown in FIG.
4
. Simulations were done at temperatures of −10° C., 25° C. and 105° C. The transistor models used were typical for NMOS and PMOS (IT) slow for both (SS) and fast for both (FF). In addition corner models were used, fast NMOS, slow PMOS (FNSP) and slow NMOS and fast PMOS (SNFP). The variation of slow or fast models corresponds to approximately three sigma process variations. An undesirable VBG variation of about 130 mV was seen over all simulated conditions.
What is desired, therefore, is a bandgap reference voltage circuit that is more immune to process and temperature variations, yet takes advantage of the generally stable reference voltage gener

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