Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2003-05-15
2004-09-07
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
Reexamination Certificate
active
06788131
ABSTRACT:
DESCRIPTION OF THE INVENTION
1. Field of the Invention
This invention relates in general to a bandgap circuit and, more particularly, to a bandgap circuit for providing a reference voltage.
2. Background of the Invention
Bandgap circuits have conventionally been used to provide a reference voltage by which an input voltage is measured. An example of a conventional bandgap circuit is illustrated in FIG.
1
.
Referring to
FIG. 1
, a bandgap circuit
10
generally includes a chopping circuit
12
for generating a voltage level, and a filter circuit
14
to filter out offset noises generated from an offset voltage in chopping circuit
12
as the result of asymmetric fabrication processes. Filter circuit
14
includes a resistor (R) coupled in parallel to a capacitor (C), both of which contribute to the relative large chip area occupied by conventional bandgap circuits. The trend in modem semiconductor processing, of course, if toward smaller chip size. This cannot be obtained with conventional filter circuit
14
.
Bandgap circuit
10
may also include an operational amplifier
16
for amplifying a filtered voltage level. Operational amplifier
16
is coupled to an analog-to-digital converter (“CADCS”)
18
that converts an analog input voltage V
i
, controlled by the amplified voltage from operational amplifier
16
, to a digital output at a predetermined frequency, for example, ranging from 1 KHz to 10 KHz. However, chopping circuit
12
generally includes metal-oxide-semiconductor (“MOS”) switches (not shown) that operate at a high switching frequency, for example, 200 KHz. The discrepancy between the converter's working frequency and the MOS switch's switching frequency may result in “chopping noises” in the reference voltage provided by bandgap circuit
10
.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a bandgap circuit that obviates one or more of the problems due to limitations and disadvantages of the related art.
To achieve these and other advantages, and in accordance with the purpose of the invention as embodied and broadly described, there is provided a circuit for providing a reference voltage that includes a chopping circuit for generating a voltage level, a converter coupled to the chopping circuit for converting an input voltage into a digital output based on the voltage level, and generating a first output in a predetermined period, and a second output in a subsequent second predetermined period, a controller for controlling the chopping circuit such that the chopping circuit generates the voltage level in a same period as the predetermined period, a first register coupled to the converter for storing the first output, a second register coupled to the converter for storing the second output, and a combiner for combining the first and the second outputs.
In one aspect, the controller provides a clock signal having a same period as the predetermined period to the chopping circuit.
In another aspect, the controller synchronizes the converter with the chopping circuit by providing a signal to initiate the converter.
Also in accordance with the present invention, there is provided a circuit for providing a reference voltage that includes a chopping circuit for generating a voltage level (V
0
), an analog-to-digital converter coupled to the chopping circuit for converting an input voltage (V
in
) into a digital out based on the voltage level, and generating a first output (V
1
) of N bits in a first predetermined period, and a second output (V
2
) of N bits in a subsequent second predetermined period, a controller for synchronizing the chopping circuit and the converter by providing a clock to the chopping circuit and simultaneously a signal to initiate the converter such that the chopping circuit generates the voltage level in a same period as the predetermined period, a first register coupled to the converter for storing the first output, a second register coupled to the converter for storing the second output, and a combiner for combining the first and the second outputs and providing the reference voltage.
Sill in accordance with the present invention, there is provided a method of providing a reference voltage that includes providing a chopping circuit, generating a voltage level through the chopping circuit, converting an input voltage into a digital form based on the voltage level, defining a first predetermined period, defining a second predetermined period, generating a first output of the input voltage in the first predetermined period, generating a second output of the input voltage in the second predetermined period, providing a clock to the chopping circuit, generating the voltage level in a same period as the first predetermined period, and combining the first and the second outputs to form the reference voltage.
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate several embodiments of the invention and together with the description, serve to explain the principles of the invention.
REFERENCES:
patent: 6275098 (2001-08-01), Uehara et al.
patent: 6462612 (2002-10-01), Roh et al.
Feature Integration Technology Inc.
Zweizig Jeffrey
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