Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-12-20
2003-03-18
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
Reexamination Certificate
active
06535054
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to reference voltage circuits and, more particularly, to a band-gap reference circuit with operational amplifier offset cancellation.
BACKGROUND OF THE INVENTION
The rapid proliferation of local area network (LANs) in the corporate environment and the increased demand for time-sensitive delivery of messages and data between users has spurred development of high-speed (gigabit) Ethernet LANs. The 100BASE-TX Ethernet LANs using category-5 (CAT-5) copper wire and the 1000BASE-T Ethernet LANs capable of one gigabit per second (1 Gbps) data rates over CAT-5 data grade wire use new techniques for the transfer of high-speed data symbols.
Conventional 1000BASE-T Ethernet LAN drivers, in addition to nearly all other signal processing/communication chips and systems, use band-gap reference circuits. These band-gap reference circuits are able to generate relatively constant reference voltages that have a well-defined magnitude, as well as minimal process variation, temperature variation, and voltage variation.
However, conventional CMOS-based band-gap reference circuits are highly prone to variations as a result of random mismatches of the MOS transistors. These mismatches are often manifested as current mismatches and, in the case of operational amplifiers, as offset voltages.
SUMMARY OF THE INVENTION
In accordance with the present invention, a band-gap reference circuit with offset cancellation is provided that substantially eliminates or reduces disadvantages and problems associated with conventional systems. In particular, input offset voltages and component mismatches due to process variation are averaged out, resulting in the band-gap reference circuit generating a more stable reference voltage.
According to one embodiment of the present invention, a band-gap reference circuit with offset cancellation is provided that includes a differential amplifier circuit. The differential amplifier circuit includes a first input node and a second input node. The first input node is operable to receive a first input signal. The second input node is operable to receive a second input signal. The band-gap reference circuit is operable to alternate between a first state and a second state based on a specified duty cycle. The first input node is an inverting node and the second input node is a non-inverting node in the first state, and the first input node is a non-inverting node and the second input node is an inverting node in the second state. The differential amplifier circuit is operable to generate an output signal based on a difference between the first and second input signals.
According to another embodiment of the present invention, a band-gap reference circuit with offset cancellation is provided that includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first first-state switch, and a first second-state switch. The first PMOS transistor has a source coupled to a power supply. The second PMOS transistor has a source coupled to a drain of the first PMOS transistor and a gate coupled to a first input node. The third PMOS transistor has a source coupled to the power supply and a gate coupled to a gate of the first PMOS transistor. The fourth PMOS transistor has a source coupled to a drain of the third PMOS transistor, a drain coupled to a drain of the second PMOS transistor and to ground, and a gate coupled to a second input node. The first first-state switch is operable to couple the drain of the first PMOS transistor to the gate of the first PMOS transistor when the band-gap reference circuit is in a first state. The first second-state switch is operable to couple the drain of the third PMOS transistor to the gate of the third PMOS transistor when the band-gap reference circuit is in a second state.
Technical advantages of one or more embodiments of the present invention include providing an improved band-gap reference circuit. In a particular embodiment, the band-gap reference circuit alternates between a first state and a second state based on a specified duty cycle. When the band-gap reference circuit is in the first state, a first input node for a differential amplifier circuit comprises an inverting node and a second input node for the differential amplifier circuit comprises a non-inverting node. When the band-gap reference circuit is in the second state, the first input node comprises a non-inverting node and the second input node comprises an inverting node. As a result, offset cancellation is provided for the band-gap reference circuit. Accordingly, the input offsets of the differential amplifier circuit and component mismatches due to process variation are averaged out, resulting in a more stable reference voltage.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, description, and claims.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation, such a device may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.
REFERENCES:
patent: 4375595 (1983-03-01), Ulmer et al.
patent: 5087834 (1992-02-01), Tsay
patent: 5352972 (1994-10-01), Pernici et al.
patent: 6275098 (2001-08-01), Uehara et al.
Ceekala Vijaya G.
Lewicki Laurence Douglas
Wieser James B.
Munck, P.C. Davis
National Semiconductor Corporation
Zweizig Jeffrey
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