Ballistic hetero-junction transistor with transverse two dimensi

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357 22, 357 34, 357 56, 357 58, H01L 29161

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047588683

ABSTRACT:
The invention relates to a semiconductor device of the hetero-junction transistor type comprising a stack of semiconductor layers which in combination constitute the source, drain and gate regions, while the current path between the source and drain regions is substantially at right angles to the various junctions. The gate region constitutes an electron accumulation region in the form of a two-dimensional quasi Fermi-Dirac gas which can be brought to the desired polarization potential of at least one gate electrode, while the electrons forming the source-drain current traverse this electron cloud without having a strong interaction with it, in ballistic or quasi-ballistic conditions.

REFERENCES:
patent: 4163237 (1979-07-01), Dingle et al.
patent: 4194935 (1980-03-01), Dingle et al.
patent: 4366493 (1982-12-01), Braslau et al.
patent: 4414557 (1983-11-01), Amemiya et al.
patent: 4424525 (1984-01-01), Mimura
patent: 4455564 (1984-06-01), Delagebeaudeuf et al.
patent: 4460910 (1984-07-01), Chappell et al.
patent: 4482910 (1984-11-01), Nishizawa et al.
T. Mimura et al., "A New FET . . . Heterojcns," JAP, J.A.P., vol. 19, #5, May 1980, pp. 6225-6227.

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