Ball grid array via structure

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C029S840000, C438S015000, C428S131000, C228S180210

Reexamination Certificate

active

06252779

ABSTRACT:

FIELD OF THE INVENTION
The present invention is in the field of integrated circuits. More particularly, the present invention provides an improved method and apparatus for joining electronic devices to vias in a substrate.
BACKGROUND OF THE INVENTION
Electronic devices, such as integrated circuit chips, are commonly attached to a substrate (e.g., a printed circuit board (PCB) or printed circuit card (PCC)) with solder ball connecters using a ball grid array (BGA) connection technique. As known in the art, BGA generally involves the attachment of an array of solder balls located on the underside of an electronic device to a corresponding array of contact pads located on a surface of a substrate, using individual solder joints. Typically, each of the contact pads on the surface of the substrate is connected to a via that provides an electrically conductive path between the electronic device and wiring patterns located within internal layers of the substrate. The via may comprise, for example, a plated through hole (PTH), wherein the through hole extends through the thickness of the substrate and is lined with an electrically conductive material, or similar structure. A contact pad may be electrically connected to a via by a “dog-bone” or other type of connection, or may comprise a portion of the via itself. In the latter case, the contact pad or “via pad” generally extends above the top surface of the substrate directly above the via. The use of such “direct via” connections allows a designer to increase the density of electronic devices connected to a circuit board.
Typically, a low melting temperature eutectic solder paste, an electrically conductive adhesive, or other suitable material, is used to connect the solder balls on the electronic device to the via pads on the substrate. Unfortunately, a problem may occur when a solder ball connection is made to a via pad using a conventional “direct via” connection technique. Specifically, as the low melting temperature eutectic solder paste is heated and melts to form a connection between a solder ball and a via pad, the solder may be pulled down by a “wicking” action into the via away from the connection point. As a result of the wicking action, voids may form at the connection between the solder ball and the via pad, thereby causing increased electrical resistance. Further, the degraded connection between the solder ball and the via pad is more likely to fail over time due to thermal cycling. Additionally, water vapor or other gases or fluids may enter the via, causing corrosion of the conductive plating of the via or other damage to the via structure.
SUMMARY OF THE INVENTION
The present invention avoids the disadvantages of the prior art by providing a improved method and apparatus for joining an electronic device to a substrate. Although the present invention is primarily directed to the interconnection of electronic devices to a substrate using a ball grid array technique wherein a solder ball is connected to a via pad located directly over a via, it should be readily apparent that the present invention can be used with other interconnection methods without departing from the intended scope of the invention.
In accordance with the present invention, a high melting temperature solder ball (e.g., a 90/10 or 93/7 Pb/Sn alloy) is pressed, forced or otherwise inserted into the opening of a via to completely plug the via prior to the application of a layer of a low melting temperature eutectic solder paste (e.g., 63/37 Pb/Sn). Advantageously, by plugging the via in this manner, wicking of the low melting temperature eutectic solder paste into the via is prevented during subsequent processing steps.
After the via has been plugged, a low melting temperature eutectic solder paste is added to the via pad. Thereafter, a solder ball attached to an electronic device is placed on the low melting temperature eutectic solder paste, and the assembly is heated to reflow the low melting temperature eutectic solder paste, thereby connecting the solder ball attached to an electronic device to the via pad. The remaining, unfilled portion of the via may then be filled with an electrically conductive or insulating material to prevent fluids or gases from entering the via and corroding or otherwise damaging the conductive plating of the via.
In another embodiment of the present invention, a second high melting temperature solder ball can be pressed, forced or otherwise inserted into the second open end of the via. Plugging both ends of the via with solder balls prevents fluids or gases from entering the via and corroding or otherwise damaging the conductive plating of the via.
In another embodiment of the present invention, the via is initially filled with a soft conductive wire material, hereafter referred to as a “wire”, that is coated with a low melting temperature solder material, such as a eutectic solder. For example, a tin coated (e.g., a 90/10 or 97/3 Pb/Sn wire may be used. The wire is inserted into the via and is severed such that the ends of the wire extend out of the via beyond the via pad and/or surface of the substrate. The wire is then compressed in length causing the wire to expand in diameter within the via. This causes the outside surface of the wire to compress against the inner conductive plating of the via, thus creating a tight mechanical bond between the wire and the via. The wire is compressed in length until the ends of the wire are substantially flush with the surface of the via pad on the substrate. The substrate may then be heated to reflow the coating of low temperature solder material on the wire to bond the wire to the conductive plating of the via. After the via hole has been plugged with the wire, a low melting temperature eutectic solder paste is added to the area on top of the via pad. Thereafter, a solder ball attached to an electronic device is placed on the low melting temperature eutectic solder paste, and the assembly is heated to reflow the low melting temperature eutectic solder, thereby connecting the solder ball to the via pad.
In an alternate embodiment of the above-described wire plugging technique, the via is filled with a soft conductive wire material that does not have a coating. When the wire is compressed in length, the diameter of the wire within the via increases, causing the outer surface of the wire to compress against the conductive sleeve of the via, thereby creating a tight mechanical bond between the wire and the via.
Generally, the present invention provides a method for forming an electrical connection, including the steps of:
providing a substrate having a conductive opening therein;
securely positioning a first electrically conductive member within the conductive opening to plug the conductive opening;
positioning a quantity of a bonding material onto the first electrically conductive member;
positioning a second electrically conductive member onto the bonding material; and
heating the bonding material to bond the first and second electrically conductive members, thereby forming an electrical connection.
A further embodiment of the present invention provides a method for forming an electrical connection, including the steps of:
providing a substrate having a conductive opening therein;
inserting a length of an electrically conductive wire material into the conductive opening;
compressing opposing ends of the wire material to expand a diameter of the wire material within the conductive opening to plug the conductive opening;
positioning a quantity of a bonding material onto an end of the wire material;
positioning an electrically conductive member onto the bonding material; and
heating the bonding material to bond the wire material to the electrically conductive member, thereby forming an electrical connection.


REFERENCES:
patent: 4967314 (1990-10-01), Higgins, III
patent: 5275330 (1994-01-01), Isaacs et al.
patent: 5337219 (1994-08-01), Carr et al.
patent: 5463191 (1995-10-01), Bell et al.
patent: 5482736 (1996-01-01), Glenn et al.
patent: 5487218 (1996-01-01), Bhatt et al.
patent: 549

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