Ball grid array package for an integrated circuit

Details Ball grid array package for an integrated circuit Ball grid array package for an integrated circuit

1995-06-05

1998-04-21

Niebling, John

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Insulative housing or support

438126, H01L 2160

Patent

active

057417296

ABSTRACT:
A three-layer BGA package includes a BGA Vss plane disposed between upper and lower BGA package traces, and also includes upper and lower BGA package Vss traces on the outer periphery of the BGA package. Vias electrically and thermally couple the BGA Vss plane to upper and lower BGA package Vss traces. Other vias electrically couple Vdd and IC signals from Vdd and signal traces on the upper and lower surfaces of the BGA package. Solder balls connected to the BGA package lower traces are soldered to matching traces on a system PCB. The periphery Vss traces, vias and solder balls help maintain current flow in the BGA Vss plane. In addition to providing a low impedance current return path (and thus reduced ground bounce and reduced IC signal delay time) for current sunk by an IC within the BGA package, the BGA Vss plane provides heat sinking. A four-layer BGA package further includes a BGA Vdd plane located intermediate the BGA Vss plane and the traces on the lower surface of the BGA package. Fabricated from two pieces of symmetrical printed circuit board material, this embodiment reduces ground bounce for IC current sourcing as well as IC current sinking, and provides approximately a 100% improvement in thermal dissipation as compared to prior art BGA packages.

REFERENCES:
patent: 3239469 (1966-03-01), Dougherty, Jr.
patent: 3568000 (1971-03-01), D'Aboville
patent: 3582865 (1971-06-01), Franck et al.
patent: 4513355 (1985-04-01), Schroeder et al.
patent: 4535385 (1985-08-01), August et al.
patent: 4739448 (1988-04-01), Rowe et al.
patent: 4866841 (1989-09-01), Hubbard
patent: 5010641 (1991-04-01), Sisler
patent: 5012386 (1991-04-01), McShane et al.
patent: 5102829 (1992-04-01), Cohn
patent: 5264729 (1993-11-01), Rostoker et al.
patent: 5291062 (1994-03-01), Higgins, III
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5397917 (1995-03-01), Ommen et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5490324 (1996-02-01), Newman
patent: 5508556 (1996-04-01), Lin
patent: 5521435 (1996-05-01), Mizukoshi
Tummala et al. Eds., Microelectronics Packaging Handbook, Van Nostrand Reinhold, pp. 687-691, 1989.

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