Balanced voltage comparator

Details Balanced voltage comparator Balanced voltage comparator

1992-09-02

1994-02-15

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

307355, 330261, H03F 345

Patent

active

052870707

ABSTRACT:
A biasing system for a CMOS differential comparator includes a unity gain amplifier for developing a reference voltage corresponding to the trip point of an output inverter. The reference voltage is applied to a voltage to current converter for developing a reference current proportional to the reference voltage. The reference current biases the output inverters at their trip points when the input voltages to the differential comparator are at the same potential. The biasing system includes a reference inverter having characteristics substantially identical to the output inverters. The output and input of the reference inverter are connected together so that a reference voltage is established at the inverter output which is always at the switch point of the inverter. A differential transistor stage includes resistive loads matched in process characteristics and sized to each pass one-half the value of the reference current to reduce the load capacitance at the differential stage. An output stage of the comparator circuit uses a source follower with characteristics matching those of the voltage to current converter so that the output nodes at the source follower have the same value as the reference voltage.

REFERENCES:
patent: 4048575 (1977-09-01), Musa
patent: 4459555 (1984-07-01), Jett, Jr.
patent: 4598215 (1986-07-01), Schechtman et al.
patent: 4626713 (1986-12-01), Lee
patent: 4835417 (1989-05-01), Kousaka et al.
patent: 4859928 (1989-08-01), Etheridge
patent: 4965468 (1990-10-01), Nicollini et al.
patent: 5132560 (1992-07-01), Kane

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