Balanced synchronous detector circuit

Details Balanced synchronous detector circuit Balanced synchronous detector circuit

1976-11-11

1977-10-18

Grimm, Siegfried H.

Demodulators

Amplitude modulation demodulator

Having specific distortion, noise or other interference...

179 15BT, 329112, 329122, H03D 318, H04H 500

Patent

active

040548392

ABSTRACT:
A balanced synchronous detector circuit for detecting the amplitude of a received signal and for detecting the phase difference between the received signal and a generated signal. A preferred application of this balanced synchronous detector circuit is in a stereo decoder of the type used for receiving and decoding a composite stereo signal. The balanced synchronous detector circuit includes a first double-balanced modulator having a first section provided with a first set of input terminals to which the received signal is applied and a second section provided with a second set of input terminals to which the locally generated signal is applied. The balanced synchronous detector circuit further includes a second double-balanced modulator having a first section formed of a portion of the second section of the first double-balanced modulator and a second section provided with a set of input terminals to which another locally generated signal is applied. An output signal derived from the second section of the second double-balanced modulator is proportional to the amplitude of the received signal, and an output signal derived from the second section of the first double-balanced modulator is proportional to the phase difference between the received signal and the locally generated signal.

REFERENCES:
patent: 3798376 (1974-03-01), Limberg
patent: 3842211 (1974-10-01), Metro
patent: 3934092 (1976-01-01), Csicsatka

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