Balanced signal receiving circuit

Details Balanced signal receiving circuit Balanced signal receiving circuit

1990-09-19

1992-02-11

LaRoche, Eugene R.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307355, 307234, H03K 522

Patent

active

050878328

ABSTRACT:
A receiving circuit includes of a differential amplifier which receives at an input stage a balanced signal transmitted from a pair of signal transmission lines and outputs a logic "H" or "L". An alarm generating unit which includes positively and negatively biased first and second differential amplifiers, a logic gate unit and a pulse width detection unit. The logic gate unit is located at the input stage of the differential amplifier and displays the detection of a small differential voltage appearing at the time abnormalities are detected. The pulse width detection unit produces an alarm signal when the pulse width of the output pulse from the logic gate unit has become longer than a predetermined pulse width. By using the first and second differential amplifiers, it is possible to prevent the signal transmission lines from becoming sources of electromagnetic interference (EMI).

REFERENCES:
patent: 4225795 (1980-09-01), Keeney
patent: 4945261 (1990-07-01), Wright

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