Balanced offset compensation circuit

Details Balanced offset compensation circuit Balanced offset compensation circuit

2006-08-15

2008-07-01

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Unwanted signal suppression

C327S094000, C327S337000, C330S009000, C341S155000

Reexamination Certificate

active

07394309

ABSTRACT:
Balanced offset compensation is provided for a differential amplifier circuit. Two sets of three switches are employed between respective inputs and outputs of the differential amplifier to shunt the outputs to the input terminals during auto-zeroing phase. By opening and closing different combinations of the switches during auto-zeroing and operation phases, differential degradation due to unbalanced leakage currents is substantially reduced.

REFERENCES:
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patent: 4697152 (1987-09-01), Westwick
patent: 5410272 (1995-04-01), Haberland et al.
patent: 5479130 (1995-12-01), McCartney
patent: 6166581 (2000-12-01), Liu et al.
patent: 6377638 (2002-04-01), Tamura et al.
Petrie, C.; Tianxue Sun; Miller, M., “A high-gain offset-compensated differential amplifier”, Circuits and Systems, 2004. ISCAS apos:04. Proceedings of the 2004 International Symposium on vol. 1, Issue, May 23-26, 2004 pp. I-489-492 vol. 1; Digital Object Identifier 10.1109/ISCAS.2004.1328238.

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