Patent
1981-09-24
1984-02-14
Pellinen, A. D.
179170T, H04B 158
Patent
active
044318740
ABSTRACT:
A balanced multiplier circuit for a subscriber loop interface circuit (SLIC) which provides both loop current to a two-wire bidirectional subscriber loop and suppression of longitudinal signals generated at the two-wire loop input to the SLIC while maintaining the midpoint load voltage at half the available power supply voltage applied to the SLIC.
REFERENCES:
patent: 4004109 (1977-01-01), Boxall
patent: 4041252 (1977-08-01), Cowden
patent: 4203012 (1980-05-01), Boxall
patent: 4272656 (1981-06-01), Nishikawa
patent: 4275277 (1981-06-01), Ferrieu
patent: 4300023 (1981-11-01), Kelley et al.
"3081 and 3082 Subscriber Line Interface Circuits (SLIC)"; ITT North Microsystems Divisions Product Bulletin; Jun. 1978; pp. 1-4.
L. Brown & B. Bynum; "One Chip Closes in on SLIC Function"; Electronic Design; Sep. 1980; pp. 85-91.
Main W. Eric
Pace W. David
Welty Dennis L.
Zobel Don W.
Bingham Michael D.
Motorola Inc.
Myers Randall P.
Pellinen A. D.
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