Balanced circuitry for reducing inductive noise of external chip

Details Balanced circuitry for reducing inductive noise of external chip Balanced circuitry for reducing inductive noise of external chip

1993-12-13

1994-07-12

Callahan, Timothy P.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307443, 328163, H01L 2500, H03B 100

Patent

active

053291700

ABSTRACT:
Ground noise associated with lead inductance in electronic systems containing multiple lead integrated circuits is substantially reduced by including, for each chip driver lead that carries a signal, a complementary lead which carries the the inverse of that signal. These balanced pairs are continued not only in the wire bonds and lead frame of the integrated circuit, but also through any connecting assembly such as a printed wiring board or multichip module to the associated balanced chip receivers.

REFERENCES:
patent: 3383618 (1968-05-01), Engelbrecht
patent: 3584235 (1971-06-01), Fukui et al.
patent: 4398106 (1983-08-01), Davidson et al.
Rainal, A. J., AT&T Bell Laboratories Technical Journal, 63, No. 1, Jan. 1984.
Blood Jr., W. R., MECL System Design Handbook, Motorola Semiconductor Products Inc., May 1980.

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