Balanced circuit arrangement and method for linearizing such...

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

Reexamination Certificate

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C455S334000, C455S333000, C455S226100, C327S358000

Reexamination Certificate

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07031687

ABSTRACT:
The present invention relates to a balanced circuit arrangement and methods for linearizing and calibrating such a circuit arrangement wherein linearization is obtained by introducing a load imbalance between the output branches of the balanced circuit arrangement. Thus, a controllable extraneous imbalance is created between the output loads of the balanced circuit arrangement to thereby obtain a linearization by means of even-order non-linearity.

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patent: 6590439 (2003-07-01), Larson
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patent: 6759904 (2004-07-01), Behzad
patent: 6892062 (2005-05-01), Lee et al.
patent: 11-122046 (1999-04-01), None
Patent Abstracts of Japan, vol. 1999, No. 09, Jul. 30, 1999 & JP 11 122046 A (NEC Corp), Apr. 20, 1999.

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