Balanced amplifier output stage

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Patent

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Details

330261, 330267, H03F 345, H03F 326

Patent

active

044504128

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention relates to a balanced amplifier output stage preferably intended to be used as a receiver amplifier in telephone instruments.


DESCRIPTION OF PRIOR ART

An output stage of a receiver amplifier in a telephone instrument should be so constructed that it can work with high efficiency even when the line voltages are low. It is for example known through Texas Instruments Application Report B107, Audio Amplifier design Bedford 1971 p 36, 37 and 39 to use a bridge connection with two series connected transistors as an amplifier output stage where the load is connected between the mid-points of the two series connections. The transistors are operated in push-pull in such a way that during half a semi-cycle the current goes through the top transistor in one series connection and the bottom transistor in the other series connection, while it during the reverse semi-cycle passes through the top transistor in the second series connection and the bottom transistor in the first series connection. The output obtained will therefore be considerably greater as the effective voltage deviation across the load will in principle be twice as great as in a single output stage of a so called "single ended push-pull" type.


SUMMARY OF THE INVENTION

The amplifiers described above present a relatively low impedance towards the current supply source. In normal audio amplifiers this does not imply an problem as the current supply source has a very low impedance, for example by being shunted with a high capacitance. If a known amplifier should be used as a receiver amplifier in a telephone instrument the current supply will take place through the subscriber's line which has a considerable impedance. There is then a great risk that the line current varies according to the signal causing a undesired feed-back which can lead to self-oscillation.
A balanced receiver amplifier according to the invention includes two transistor amplifiers connected in parallel, each one including two transistors with series connected emitter collector circuits where the load is connected between the common points of the series connected emitter collector circuits and where equally located transistors in both amplifiers are fed with input signals in push-pull characteristics of the invention appear from the attached claims.
By the circuit according to the invention an amplifier is obtained which utilizes the entire available voltage at the same time as it takes a constant current from the source so that the feed voltage is kept constant independent of the internal impedance of the current supply source. Moreover the dc-level of the amplifier will be well defined.


BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described more in detail in connection with the accompanying drawing showing a driving and an output stage in a receiver amplifier.


PREFERRED EMBODIMENT

In the FIGURE T1, T2, T3 and T4 denote four transistors which form two push-pull arranged amplifier stages T1, T3 and T2, T4 respectively which are connected in parallel and driven in push-pull. The Load Rec is connected between the common points C and D for the two transistors in the stages T1, T3 and T2, T4 respectively. As the circuit is intended to be designed as a monolitic integrated circuit all the transistors T1-T4 are of npn-type. However, it is naturally possible to use other known combinations of transistors in the push-pull stages. The output stage is driven by a differential input stae T7, T8, the base circuits of which are connected to a signal input INa, INb through the resistors R7, R8. The emitters of the differential stage are as usual connected to a constant current source Is which is schematically drawn but can consist of some transistor circuit known per se. The collector side in the differential amplifier T7, T8 is connected partly to the bases of the transistors T1 and T2 and to the terminal +V of a single voltage source through two of the collectors and the emitter of transistor T6 connected as a current mirror. A thi

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