Balance and protection for stacked RF amplifiers

Amplifiers – With semiconductor amplifying device – Including plural amplifier channels

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Details

330284, 330297, H03F 368

Patent

active

051210843

ABSTRACT:
A balance circuit for an amplifier circuit having 2.sup.M amplifiers serially biased across a supply potential node and a common potential node, where M is an integer greater than 0, and having respective 2.sup.M -1 interstage bias nodes and voltages between the amplifiers which are driven by respective input drive signals provided by 2.sup.M -1 2-way power splitters. A voltage reference circuit provides as to each power splitter first and second reference potentials respectively associated therewith. A plurality of control circuits are associated with respective power splitters and interstage nodes. Each control circuit is responsive to the associated first and second reference potentials and the interstage bias node for controlling the signal levels of the first and second drive signals provided by the associated 2-way splitter as a function of the associated interstage bias potential relative to the first and second reference potentials.

REFERENCES:
patent: 4631493 (1986-12-01), Vendelin

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