Backlight control device and display apparatus

Electric lamp and discharge devices: systems – Current and/or voltage regulation – Automatic regulation

Reexamination Certificate

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Details

C315S297000, C315S2090SC, C315SDIG002, C345S102000, C345S213000, C345S690000, C345S087000

Reexamination Certificate

active

07667415

ABSTRACT:
A PWM generation circuit is set so as to generate a PWM pulse signal having a frequency that is an odd number times a vertical synchronization frequency. A frequency division circuit frequency-divides the PWM pulse signal generated by the PWM generation circuit. An AND gate calculates the logical product of the PWM pulse signal generated by the PWM generation circuit and a frequency-division pulse signal outputted from the frequency division circuit. An OR gate calculates the logical sum of the PWM pulse signal generated by the PWM generation circuit and the frequency-division pulse signal outputted from the frequency division circuit. A selector outputs an output signal of the OR gate as a dimming pulse signal in a case where the set duty ratio is not less than 50%, while outputting an output signal of the AND gate as a dimming pulse signal in a case where the set duty ratio is less than 50%. Consequently, the frequency of the dimming pulse signal is five-second the frequency of a vertical synchronizing signal.

REFERENCES:
patent: 5105127 (1992-04-01), Lavaud et al.
patent: 5337068 (1994-08-01), Stewart et al.
patent: 5844540 (1998-12-01), Terasaki
patent: 6118221 (2000-09-01), Kumasaka et al.
patent: 6226196 (2001-05-01), Toshinari et al.
patent: 6407480 (2002-06-01), Nakanishi et al.
patent: 7233307 (2007-06-01), Miura et al.
patent: 6-243987 (1994-09-01), None
patent: 7-325286 (1995-12-01), None
patent: 11-126696 (1999-05-01), None
patent: 11-297485 (1999-10-01), None
English language Abstract of JP 11-297485.
English language Abstract of JP 6-243987.
English language Abstract of JP 11-126696.
English language Abstract of JP 7-325286.

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