Background operation for memory cells

Details Background operation for memory cells Background operation for memory cells

2005-01-18

2005-01-18

Lebentritt, Michael S. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185110, C365S185180

Reexamination Certificate

active

06845045

ABSTRACT:
A technique to perform an operation (e.g., erase, program, or read) on memory cells (105) is to apply an operating voltage dynamically to the gates (111, 113) of the memory cells, rather than a continuous operating voltage. This reduces the power consumed during the operation. Dynamic operation or background operation such as background erase also permits other operations, such as read, program, or erase to occur while the selected memory cells are operated on. This improves the operational speed of an integrated circuit using dynamic operation compared to a continuous operation. A transfer transistor controls coupling of the operating voltage to a node of the memory cells selected for dynamic operation. When the node is substantially charged to the operating voltage it is floated by turning off the transfer transistor. The dynamically held operating voltage is allowed to perform the memory operation with the occasional refresh.

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