Back-sampling charge redistribution analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341161, H03M 138

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active

049821946

ABSTRACT:
Aperture delay and jitter are reduced when the sequence of operation of a charge redistribution analog to digital converter is arranged so that signal acquisition occurs in the idle time of the converter. Conversion begins by terminating the acquisition or sample phase immediately upon receipt of the start conversion command. Approximation begins directly thereafter. Upon completion of the successive approximation conversion phase and latching the result the capacitor array is discharged. The comparator offset is sampled and held and the acquisition phase is initiated and continues until receipt or occurrence of the next start conversion command.

REFERENCES:
patent: 4129863 (1978-12-01), Gray et al.
patent: 4200863 (1980-04-01), Hodges et al.
patent: 4282515 (1981-08-01), Patterson, III
patent: 4388612 (1983-06-01), Takagi et al.
patent: 4531113 (1985-07-01), Abraham
patent: 4618852 (1986-11-01), Kelley et al.
patent: 4641130 (1987-02-01), Mastroianni
"All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques-Part 1", McCreary et al., IEEE, Solid State Circuits, vol. SC-10, pp. 371-379, Dec. 1975.

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