Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2001-01-02
2002-12-24
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S464000, C438S067000, C438S149000
Reexamination Certificate
active
06498073
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is generally related to the field of imagers, such as, photon detectors and image sensors/focal plane arrays. In particular, the present invention relates to a back illuminated image array device and a method of constructing such a device.
Imagers such as photon detectors, image sensors/focal plane arrays, and the like, are of interest in a wide variety of sensing and imaging applications in a wide range of fields including consumer, commercial, industrial, and space.
Presently, imagers based on charge coupled devices (CCDs) are most widely utilized. However, imagers based on charge injection devices (CIDs) are gaining popularity since they provide unique performance characteristics over CCDs, such as, a non-destructive readout, superior anti-blooming, inherent radiation tolerance, random pixel addressing, and high readout rates. CIDs are becoming utilized more, particularly, in applications where their unique performance characteristics are advantageous. It is in the field of these two types of imagers in which the present invention can be best utilized.
Both of these imagers are typically fabricated on a silicon wafer, more typically, a wafer having an epitaxial silicon front layer. These devices are typically designed for front side illumination. Front side illumination, while traditionally utilized in standard imagers, has significant performance limitations such as: 1) low fill factor/low sensitivity and 2) limited spectral response, particularly in the UV to blue region of the spectrum.
The problem of low fill factor/low sensitivity is typically due to the shadowing caused by the presence of opaque metal bus lines, and absorption by the array circuitry structure formed on the front surface in the pixel region. Thus, the active region of the pixel is typically very small (low fill factor) in large format (high-resolution) front illuminated imagers. This structure reduces the overall sensitivity of the imager.
The problem of limited spectral response, particularly in the UV to blue region of the spectrum, is also typically due to the absorption of these wavelengths in the UV to blue region by the array circuitry structure.
To solve these problems, back illuminated CCDs have been proposed in the prior art. They are typically fabricated by thinning of the silicon wafer after fabricating the CCD circuitry by techniques such as surface grinding and mechanical polishing, and etching of the back of the silicon wafer. However, this approach limits the minimum silicon wafer thickness due to the need for the silicon wafer to be self-supporting and accessible for illumination from the back side. A silicon thickness for the optimum UV to near IR response is typically in the range of 5-10 microns. This is difficult to achieve using the prior art techniques that produce self-supporting silicon structures with backside thinning.
The present invention addresses these needs, as well as other problems associated with existing imager devices.
SUMMARY OF THE INVENTION
The present invention is a back illuminated image array device and a method of constructing such a device. The device is generally comprised of an array circuitry layer, a front layer, and a quartz layer. The array circuitry layer is defined on one surface of a front layer. The quartz layer is mounted on the other surface of the front layer.
The method of fabricating the device is generally comprised of the following steps. The method provides a Silicon-on-Insulator (SOI) wafer having a thick silicon layer, an oxide (SiO
2
) layer on the thick silicon layer, and a thin front silicon layer on the oxide layer. The front layer has a first surface and a second surface with the second surface proximal to the oxide layer. Array circuitry is formed on the first surface of the front layer. A temporary layer is applied to the surface of the array circuitry. The thick silicon layer and the oxide layers are removed from the wafer, thereby, exposing the second surface of the front layer. A quartz layer is applied to the second surface. The temporary layer is removed from the array surface.
The aforementioned benefits and other benefits including specific features of the invention will become clear from the following description by reference to the accompanying drawings.
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Chanley Charles S.
Sarma Kalluri R.
Honeywell International , Inc.
Niebling John F.
Simkovic Viktor
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