Back bias voltage detection circuit for semiconductor memory dev

Details Back bias voltage detection circuit for semiconductor memory dev Back bias voltage detection circuit for semiconductor memory dev

1995-09-08

1998-10-06

Wong, Peter S.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

36518909, 36518906, 327537, 327535, G05F 316

Patent

active

058182136

ABSTRACT:
A back bias voltage detection circuit used for a semiconductor memory device wherein a threshold voltage of an NMOS transistor is varied by the back bias voltage. The threshold voltage of the NMOS transistor is detected by comparison to a reference voltage and the back bias voltage is adjusted according to the threshold voltage, with variable amplification of the back bias voltage. This control of the back bias voltage provides more effective control of the threshold voltage of the NMOS transistor.

REFERENCES:
patent: 5262989 (1993-11-01), Lee et al.
patent: 5264784 (1993-11-01), Oritiz
patent: 5270584 (1993-12-01), Koshikawa et al.
patent: 5315557 (1994-05-01), Kim et al.

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