Averaging and peak detection circuit

Details Averaging and peak detection circuit Averaging and peak detection circuit

1976-10-04

1978-02-21

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307261, 307351, 324103P, 328151, H03K 520

Patent

active

040755134

ABSTRACT:
A receive line signal detector circuit having slow and fast charging modes of operation to receive both relatively long or short coded information messages. The circuit includes a transistor means to switch the circuit into either of a first slow charging, averaging mode or a second fast charging, peak detection mode of operation depending upon the presence and duration of a sequence of input information signals. The circuit, however, is slow discharging in both the averaging and peak detection modes.

REFERENCES:
patent: 3428829 (1969-02-01), Haynie et al.
patent: 3638183 (1972-01-01), Progler et al.
patent: 3949294 (1976-04-01), Imura

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