Auxiliary deflection winding driver disabling arrangement

Computer graphics processing and selective visual display system – Data responsive crt display control – Data responsive deflection control

Reexamination Certificate

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Details

C348S806000, C315S370000

Reexamination Certificate

active

06369780

ABSTRACT:

The invention relates to a beam landing correction arrangement in a video display apparatus.
BACKGROUND OF THE INVENTION
The displayed image in, for example, a direct view video display or in a projection video display having a cathode ray tube (CRT), may suffer from beam landing location errors such as geometrical and misconvergence errors. It is known to correct such errors for a CRT using a digital dynamic convergence arrangement. Correction data stored in a memory are applied via a digital-to-analog (D/A) converter and a power amplifier to, for example, an auxiliary convergence winding. The amount of correction may vary dynamically in a given deflection cycle, in accordance with the location of the beam on the display screen.
In a video display, embodying an inventive feature, correction data are stored in a non-volatile memory that retains the correction data even when it is not energized. Upon power turn on, for example, the correction data stored in the non-volatile memory are read out and stored in a volatile memory. During each deflection cycle, the data stored in the volatile memory are successively read out and applied via a D/A converter to an auxiliary convergence winding.
Non-transient alteration of the correction data may occur in the non-volatile memory, as well as in the volatile memory, because of energy released in the event of a CRT arc discharge. The non-transient data alteration might occur when the arc discharge occurred simultaneously with the reading out of the correction data from the non-volatile memory.
In carrying out an inventive feature, each convergence data word includes a parity bit derived by check summing the data in the word that is read out of the volatile memory. The parity bit is used to sense data bit error in the read out data. A parity checking detector is used to calculate the parity bit using the present read out data bits from the volatile memory. When a parity error is detected, an output and/or an input of a convergence amplifier is actively disabled to prevent a disturbance of a screen of the CRT.
SUMMARY
A video display deflection apparatus, embodying an inventive feature, includes an arrangement for generating a deflection field in a cathode ray tube to vary a beam landing location of an electron beam of the cathode ray tube. A source of beam landing error correction data that are applied to the deflection field generating arrangement is provided for varying the deflection field by a variable amount that varies in accordance with the varying beam landing location. A disabling arrangement is coupled in a signal path of the beam landing error correction data for decoupling the beam landing error correction data from the deflection field generating arrangement to prevent the beam landing error correction data from varying said deflection field when abnormal operation conditions occur.


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