Amplifiers – With periodic switching input-output
Reexamination Certificate
2000-11-20
2002-06-04
Shingleton, Michael B (Department: 2817)
Amplifiers
With periodic switching input-output
C330S258000, C341S155000
Reexamination Certificate
active
06400220
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to common mode feedback circuits for high gain differential amplifiers, such as operational amplifiers, and to high-speed analog to digital converters utilizing such amplifiers, in which common mode feedback is important for accurate results.
2. Description of Related Art
Pipelined analog to digital converters are commonly used for high-speed applications. Prior art converters of this type can be seen in U.S. Pat. Nos. 4,894,657; 4,903,026; 5,635,937; 5,929,796; 6,028,546; and in many other patents. The basic operation of this type of analog to digital converter involves providing multiple stages, each having a sample and hold amplifier (often a differential operational amplifier), a summing node, and an interstage amplifier (often a differential operational amplifier), which operate in a pipelined fashion, having a sampling mode and an amplifying mode. The first stage samples and holds an input voltage during the sampling mode, and supplies it to a single bit converter during the amplifying mode, which converts the input voltage to a single bit. The single bit is then translated to an analog voltage which is subtracted from the output of the sample and hold amplifier. The interstage amplifier amplifies the resulting difference, and drives it to the next stage during the amplifying mode. Each stage operates in similar manner to produce a number of bits of digital data which represent the input voltage.
One problem associated with pipelined analog to digital converters arises because of the need for biasing the differential operational amplifiers so that they return to a reference voltage, referred to as the analog ground voltage level, or “settle,” within a small amount of time. For high speed analog to digital converters operating for example near 160 MHz, the settling time may be on the order of a few nanoseconds. So during the sampling mode, the amplifiers are operated in an offset canceling fashion, so that the output during amplifying mode accurately tracks the input. Common mode feedback circuits have been developed to improve the offset canceling function of the amplifier. Such common mode feedback circuits are also used with a variety of other circuits that use differential amplifiers and operational amplifiers. See U.S. Pat. Nos. 5,955,922 and 5,847,601.
Thus, for a high-speed circuit, is necessary to design an operational amplifier to be used as a sample and hold amplifier, and as an interstage amplifier with high bandwidth, such as in the GHz range, for a 160 MHz clock rate analog to digital converter. Such a high bandwidth typically consumes significant bias current in the operational amplifier. Similarly, the common mode feedback topology must have fast settling characteristics. Within the short settling time, e.g. 3 ns, the outputs of the operational amplifier need to settle to the exact voltage level of analog ground. Any residue in the output voltage will be propagated to a following stage as error voltage that is amplified in subsequent pipeline stages. Also for different speed applications, the common mode feedback circuits must adjust or track the common mode bias voltage necessary to achieve the settling function.
The common mode feedback circuit generates a common mode voltage used for biasing an operating point in the differential amplifier for which the feedback is used. The common mode feedback circuit tends to generate a common mode voltage, which when applied at the biasing point causes the output of the differential amplifier to settle at the analog ground voltage, when the inputs to the differential amplifier are both at the same voltage level (e.g. at analog ground voltage level). The common mode feedback circuits rely on generation of a common mode bias voltage which has a stable value. However, it is difficult provide a common mode bias voltage which is stable over a range of temperatures, manufacturing variations, and variations in the supply voltages on the circuit, and is suitable for high speed operation.
It is desirable to provide a bias circuit for producing the common mode bias voltage that remains stable and accurate independent of temperature, process variations and variations in the supply potential. Furthermore, is desirable that the such bias voltage be generated in a manner that supports high-speed operation of the differential amplifiers utilizing the voltage. Also, is desirable this such bias circuit be suitable for use in high-speed analog to digital converters, and other applications of high gain, differential operational amplifiers.
SUMMARY OF THE INVENTION
The present invention provides a bias circuit for producing a common mode bias voltage that relies upon active, auto tracking feedback responsive to the reference voltage, such as analog ground, and to the common mode voltage to maintain a common mode voltage for establishing analog ground on the output of a differential amplifier. The bias circuit supports high-speed operation, and is stable with variations in temperature, manufacturing processes, and shifts in the supply voltages. In one embodiment, the bias circuit comprises an operational amplifier having a common mode bias terminal coupled to the common mode voltage, and feedback amplifier that has a common mode bias terminal coupled to the output of the operational amplifier and arranged in a feedback loop with the operational amplifier. The output of the operational amplifier is used as a common mode bias voltage for the common mode feedback circuit of a differential amplifier. The feedback amplifier is designed to match the differential amplifier for which the common mode bias voltage is being used, and therefore produces a common mode bias voltage that automatically produces a common mode voltage for the differential amplifier that causes proper settling.
In one embodiment, the feedback amplifier comprises a “half” operational amplifier. In this manner, the feedback amplifier can be designed to match closely a differential operational amplifier for which the common mode bias voltage is being produced.
In another embodiment, the operational amplifier in the feedback circuit is configured as a virtual short, with the output of feedback amplifier and the reference voltage supplied to its inputs. Thus, the feedback amplifier is biased to generate the reference voltage at its output, and a common mode bias voltage generated by the operational amplifier and the feedback circuit is driven to a level that causes the proper settling of the differential amplifier to the reference voltage (i.e. analog ground).
In another embodiment, the present invention provides a common mode feedback circuit for a differential operational amplifier having a positive input, a negative input, positive output, a negative output and a common mode voltage input. The common mode feedback circuit comprises a switched capacitor circuit operating in a sampling mode to sample and hold a common mode bias voltage relative to the reference voltage, and operating in an amplifying mode to apply the sampled and held common mode bias voltage across the common mode input and positive and negative outputs of the differential operational amplifier. A bias circuit is included to produce a common mode bias voltage including a second operational amplifier having a common mode bias terminal coupled to the common mode voltage input, and a feedback amplifier having a common mode bias terminal connected to the output of the second operational amplifier, and being arranged in a feedback loop with the second operational amplifier as discussed above.
In yet another embodiment of invention, a high-speed digital to analog converter is provided including multiple stages which include respective sample and hold amplifiers, respective summing nodes and respective interstage amplifiers. In this embodiment, at least one of the sample and hold amplifiers and interstage amplifiers is implemented as a high gain differential amplifier with the common mode feedback circuit described above.
Accordingl
Huang Chung Chin
Wang Chien Kuo
Haynes Mark A.
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
Shingleton Michael B
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