Autoranging time stamp circuit

Details Autoranging time stamp circuit Autoranging time stamp circuit

1986-09-15

1988-03-15

Miska, Vit W.

Horology: time measuring systems or devices

Time interval

Electrical or electromechanical

324 78D, G04F 800, G01R 2302

Patent

active

047317680

ABSTRACT:
A time stamp circuit comprises a plurality of counter programmable logic arrays for providing a Gray code count. Each count provided by the counters is associated as a time value with a specified event to be stored in memory. The count is generated automatically over a range of progressively slower frequencies provided by frequency dividing circuitry connected to an oscillator. The circuit has two modes of operation, a cumulative mode and a delta mode. In the cumulative mode, the count begins with the first occurrence of a specified event and ends when acquisition is halted. In the delta mode, a control programmable logic array automatically resets the Gray code count and thereby the clock frequency to its highest frequency each time a specified event is stored. The resolution, or time between counts, therefore is the same to begin between each pair of events.

REFERENCES:
patent: 4031739 (1977-06-01), Springer
patent: 4107600 (1978-08-01), McMannis
patent: 4590602 (1986-05-01), Wolauer

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