Automatic zero balance circuit

Measuring and testing – Specimen stress or strain – or testing by stress or strain... – Specified electrical sensor or system

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Details

73 1R, 73769, 324130, 328166, G01B 700, H04B 112

Patent

active

044148526

ABSTRACT:
An automatic zero balance circuit for nulling the initial offset signal received from a test transducer. A quadrature oscillator powers a carrier transducer with the phase reference signal. A summing circuit receives the return signal from the transducer and sums it with two other signals. The resultant summation signal is divided into two components, the phase reference component and the quadrature reference component which are fed back into the summing circuit as the two other signals. The component values nullify the return signal thereby cancelling the initial offset signal.

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Mallinson--"8-Bit DAC's Give 15-Bit Resolution in Sample-and-Hold Circuit", Electronic Design 26, Dec. 20, 1979, pp. 90, 92.

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