Automatic verification of scheduling domain consistency

Details Automatic verification of scheduling domain consistency Automatic verification of scheduling domain consistency

2007-02-13

2007-02-13

Dam, Tuan (Department: 2192)

Data processing: software development, installation, and managem

Software program development tool

Testing or debugging

C717S141000, C717S148000, C717S149000

Reexamination Certificate

active

09828284

ABSTRACT:
An analyzer that analyzes instructions and data to determine where the instructions and data might result in incorrect results when run on a multiprocessor system. The instructions and data are divided into plural domains based on the symbols used to refer to those instructions and data, and the multiprocessor system is configured to use at most one processor at a time to execute instructions and to access data from any one domain. The analyzer preferably includes a reference analyzer and a table generator. The reference analyzer determines which of the instructions and data involve references outside of their domains, and determines which of the references outside of their domains are multiprocessor unsafe references. The report generator generates a report of the multiprocessor unsafe references. Also, a checker that dynamically determines where instructions and data result in domain violations when run on a multiprocessor system. The checker includes an interface to a table of purportedly microprocessor safe references by the instructions and data outside of their domains. The table preferably includes the domains to which the references are supposed to refer. The checker also includes a reference tracker that tracks references made by the instructions and data, and a comparator that determines, when a reference in the table of purportedly microprocessor safe references is encountered during execution of the instructions and data, if the reference is actually to a domain to which that reference is supposed to refer.

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