Automatic test generator for logic devices

Details Automatic test generator for logic devices Automatic test generator for logic devices

1987-08-28

1989-08-01

Smith, Jerry

Excavating

371 27, G01R 3128

Patent

active

048539287

ABSTRACT:
An algebraic recursion process is defined to solve test conditions for sequential and combinatorial logic devices. The process is shown to be effective in identifying external pin faults, and is valid for in-circuit test conditions. Since only external pin faults are considered, there is no issue of the correspondence of Boolean products to the internal architecture of the device. Processes to identify the fault detection equation and initialization sequence are described and an effective minimization process presented. Functions simple enough to be implemented by logic networks fall within a range which is computationally tractable by the process of the invention.

REFERENCES:
patent: 4204633 (1980-05-01), Goel
patent: 4601032 (1986-07-01), Robinson
patent: 4692921 (1987-09-01), Dahbura
patent: 4696006 (1987-09-01), Kawai

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