Patent
1995-12-07
1997-08-12
Treat, William M.
395596, 395571, G06F 900
Patent
active
056574860
ABSTRACT:
Automatic test equipment utilizing a pipelined sequencer to retrieve test vectors from a random access memory during execution of a test pattern. The order of execution of the test vectors need not be sequential and can be dynamically altered by conditions measured during execution of a test pattern. Though pipelined, the sequencer provides one vector per cycle, even if the execution order is dynamically altered. The sequencer, because it is pipelined, can be implemented with relatively low cost, though slower speed, components. The disclosed sequencer is implemented with CMOS components.
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Czamara Allen J.
Rudis Romas P.
Walker Ernest P.
Maung Zarni
Teradyne, Inc.
Treat William M.
Walsh Edmund J.
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