Excavating
Patent
1996-12-20
1998-10-06
Chung, Phung M.
Excavating
G11C 2900
Patent
active
058188487
ABSTRACT:
An integrated circuit comprises a functional module such as a FLASH memory with automatic program and erase circuits, test circuitry coupled with the functional module which executes a test of the functional module and generates status information as a result of the test, and non-volatile status write circuitry coupled with the test circuitry on the chip. A circuit in the non-volatile status write circuitry is responsive to the test of the functional circuitry to write the status information to the non-volatile memory. A port is provided on the integrated circuit coupled to the non-volatile memory through which the status information stored in the non-volatile memory is accessible in a test read mode to external devices. In a FLASH EPROM embodiment, the IC includes an array of FLASH EPROM memory cells and a port through which data in the array is accessible by external devices. A test set of FLASH EPROM memory cells is provided in the array. Program and erase circuitry, coupled to the array, has a test mode to exercise the program and erase circuitry to generate status information indicating results of the test and test read mode to read out the status information. Non-volatile status write circuitry, is coupled to the program and erase circuitry and the test set, and writes the status information to the test set. The program and erase circuits include retry counts with programmable thresholds for reducing the test times of the devices.
REFERENCES:
patent: 4007452 (1977-02-01), Hoff, Jr.
patent: 4051354 (1977-09-01), Choate
patent: 4419747 (1983-12-01), Jordan
patent: 4451903 (1984-05-01), Jordan
patent: 4875188 (1989-10-01), Jungroth
patent: 4958352 (1990-09-01), Noguchi et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5260949 (1993-11-01), Hashizume et al.
patent: 5267204 (1993-11-01), Ashmore, Jr.
patent: 5327435 (1994-07-01), Warchol
patent: 5369647 (1994-11-01), Kreifels et al.
patent: 5375222 (1994-12-01), Robinson et al.
Dang-hsing Yiu Tom
Lin Tien-Ler
Liou Kong-Mou
Wan Ray L.
Chung Phung M.
Haynes Mark A.
Macronix International Co Ltd.
LandOfFree
Automatic test circuitry with non-volatile status write does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Automatic test circuitry with non-volatile status write, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automatic test circuitry with non-volatile status write will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-87059