Automatic selection of an operating frequency in a low-gain broa

Details Automatic selection of an operating frequency in a low-gain broa Automatic selection of an operating frequency in a low-gain broa

1992-11-23

1995-01-17

Pascal, Robert J.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 10, 331 17, 331 25, 331 57, 327159, H03L 700

Patent

active

053829212

ABSTRACT:
A broadband low-gain system for automatically frequency-locking a signal where the system uses digital and analog devices and techniques. The system includes a comparator, an up/down counter, a digital-to-analog converter, a decoder, a ring oscillator and a downcounter. The digital control signal is provided by the decoder and actuates one of a plurality of ring oscillator stages. The analog control signal is provided by the digital-to analog-converter and controls a fine-tune mechanism in the actuated stage. The system includes a master reset for clearing the counters.

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"Design of PLL-Based Clock Circuits" by D. Jeong et al. IEEE Jl of Solid State Circuits vol. SC-20 #2 Apr. 1987 pp. 255-261.

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