Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2009-06-24
2011-12-20
Hidalgo, Fernando (Department: 2827)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189020, C365S189150, C365S189160, C365S189170, C365S202000, C365S207000, C365S230030, C365S230040
Reexamination Certificate
active
08081534
ABSTRACT:
A semiconductor memory device is capable of scrambling input/output data according to row addresses. The semiconductor memory device includes a local line driving block configured to differentially drive a positive local line and a negative local line by selectively inverting data on a global line according to row addresses, a global line driving block configured to drive the global line by selectively inverting data on the positive local line and data on the negative local line according to the row addresses, a first cell region configured to allow a first internal data to be equalized with the data on the positive local line in response to the row addresses and column addresses, and a second cell region configured to allow a second internal data to be equalized with the data on the negative local line in response to the row addresses and the column addresses.
REFERENCES:
patent: 2008/0294912 (2008-11-01), Maeda
patent: 1020080107763 (2008-12-01), None
Hidalgo Fernando
Hynix / Semiconductor Inc.
IP & T Group LLP
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