Automatic path rearrangement for blocking switching matrix

Details Automatic path rearrangement for blocking switching matrix Automatic path rearrangement for blocking switching matrix

1981-09-01

1983-11-22

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

34082503, 179 18EA, 179 18GF, H04Q 900

Patent

active

044172443

ABSTRACT:
A method for rearranging a three stage (primary, intermediate, tertiary) switching network to permit data or digitized voice signals to be transmitted from any given primary outlet to any given tertiary inlet. The intermediate stage has fewer inlets than the number of primary stage outlets and fewer outlets than the number of tertiary stage inlets, making the network a conditionally blocking one. Two call rearranging buses are provided to assure that each signal path being rearranged is maintained to prevent data transmission dropout. Primary to intermediate and intermediate to tertiary paths are rearranged one at a time using the call rearranging buses to move free primary and tertiary links to a single intermediate matrix.

REFERENCES:
patent: 3916124 (1975-10-01), Joel, Jr.
patent: 3962552 (1976-06-01), Reines et al.
patent: 3988543 (1976-10-01), Dall'Olio
patent: 4012597 (1977-03-01), Lynk, Jr. et al.
patent: 4022982 (1977-05-01), Hemdal
patent: 4160127 (1979-07-01), Slana et al.
patent: 4245214 (1981-01-01), Beirne
patent: 4355384 (1982-10-01), Genter et al.

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