Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural oscillators controlled
Patent
1983-09-06
1985-10-29
LaRoche, Eugene R.
Oscillators
Automatic frequency stabilization using a phase or frequency...
Plural oscillators controlled
331 1A, H03L 708
Patent
active
045502927
ABSTRACT:
A frequency control system is provided which makes an initial correction of the frequency (f.sub.CLK) of its own timing circuit (50, 52, 54, 56) after comparison against a frequency (f.sub.REF) of known accuracy and then sequentially checks and corrects the frequencies of several voltage (13a . . . 13e) controlled local oscillator circuits (12a . . . 12e). The timing circuit initiates the machine cycles of a central processing unit (30) which, over a sampling interval having a duration of a fixed number of machine cycles, applies a frequency index (FI) to an input register (22) in a modulo-sum frequency divider stage (20) and enables a multiplexer (16) to clock an accumulator register (26) in the divider stage (20) with a cyclical signal derived from the oscillator circuit being checked. Upon expiration of the interval, the processing unit (30) compares the remainder (FN) held as the contents of the accumulator (26) against a stored zero-error constant and applies an appropriate correction word (CW) to a correction stage (60a, 62a, . . . 64a, . . . 60e, 62e, 64e) to shift the frequency of the oscillator being checked. A signal taken from the accumulator register (26) may be used to drive a phase plane ROM (94) and, with periodic shifts in the applied frequency index (FI), to provide frequency shift keying of the applied resultant output signal. Interposition of the phase adder (90) between the accumulator register (26) and phase plane ROM (94) additionally permits phase shift keying of the output signal by periodic variation in the value of a phase index (PI) applied to one input port of the phase adder (90). An overflow signal may be taken from an adder (24) in the frequency divider stage (20) to drive an auxiliary counter (120) to provide a prescaling number which can be used by the central processing unit (30) to expand the correction range of the control system.
REFERENCES:
patent: 3913028 (1975-10-01), Bosselaers
patent: 4086544 (1978-04-01), Fried
patent: 4121162 (1978-10-01), Alberkrack et al.
patent: 4190807 (1980-02-01), Weber
patent: 4305045 (1981-12-01), Metz et al.
patent: 4462110 (1984-07-01), Baldwin et al.
LaRoche Eugene R.
Manning John R.
Pascal Robert J.
Sandler Ronald F.
The United States of America as represented by the Administrator
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