Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2001-09-24
2003-06-03
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S289000, C330S290000
Reexamination Certificate
active
06573796
ABSTRACT:
TECHNICAL FIELD
The invention relates in general to systems and methods for automatic biasing of LDMOS devices. More particularly the invention relates to providing systems and methods for automatic biasing of LDMOS power transistors that can compensate for hot carrier effects and temperature changes. The systems and methods can be readily scaled to simultaneously set the bias points of multiple LDMOS devices.
BACKGROUND OF THE INVENTION
Laterally Diffused Metal-Oxide Semiconductor (LDMOS) devices are known in the arts. Over the past few years, LDMOS radio frequency (RF) power transistors have become widely used in high frequency applications such as for example, mobile telecommunications base stations. These devices are quite linear when properly biased. Typically, such devices are run in a “Class AB” mode. This mode of operation requires the setting of the gate voltage, or bias, for each device for the desired quiescent drain current. In some cases, biasing is accomplished with a simple potentiometer and in some cases with more sophisticated arrangements which also attempt to compensate for temperature and/or hot electron or hot carrier effects. Some combination of burn-in, laser trimming, trimming by potentiometer or external computer, and chip selection, are generally used to set the bias points, or compensate for expected inaccuracies in the bias points, of LDMOS devices.
There are several problems commonly encountered with current biasing techniques. The known techniques suffer from serious shortcomings including being time consuming and expensive. Generally, known techniques must be performed on each LDMOS device individually, due to the complexities of trying to perform such procedures on multiple devices automatically. Due to the changes inherent in LDMOS devices over time, the appropriateness of fixed bias points set by conventional techniques degrade overtime. For example, burn-in is often used. Burn-in is a technique wherein the LDMOS device is operated for a time at the factory and then the bias point is permanently set. Since the most dramatic changes in the bias point occur early in the life cycle of a LDMOS device, this method avoids the most dramatic changes in the device characteristics, and then sets a fixed bias point. A serious shortcoming with this technique is caused by the fact that the device characteristics continue to change. Thus, the fixed bias point becomes less matched to the actual device as it is used.
The problem of fixed bias points degrading overtime is largely caused by a phenomenon known as hot-carrier effect. Hot-carrier effect occurs in all MOS transistor devices. In the vicinity of the drain under operational conditions, carriers periodically obtain a sufficient amount of energy to break free from the silicon/silicon dioxide surface barrier and enter the oxide. Neutral centers in the oxide trap some of the injected charge causing a charge build-up. This charge build-up is cumulative, and can result in significant changes to the operating characteristics of the device over time resulting in a curtailment of the useful life of the device.
Temperature effects are another problem encountered in the art for the simple reason that the electrical characteristics of the device can change with changes in temperature. This results in changes in the optimal bias point as the device is heated or cooled. Temperature effects are transient in nature, which presents difficulties with selecting a fixed bias point.
Due to the above and additional problems in the LDMOS biasing art, improved methods and systems for automatically adjusting the bias point of LDMOS devices would provide significant advantages in terms of precision, increased device life, reduced manufacturing costs, and increased efficiency in terms of time and complexity when setting bias points for multiple devices. Methods and systems for resetting an LDMOS device bias point at turn-on would largely compensate for hot-carrier effects.
SUMMARY OF THE INVENTION
In general, the invention provides systems and methods for setting the bias point of an LDMOS device. The systems and methods provide automatic adjustment of the bias point of an LDMOS device according to changes in device characteristics.
A disclosed method for setting the bias point of an LDMOS device includes steps for sensing the current draw of an LDMOS device and comparing the current draw of the LDMOS device to a reference. A step of responsively applying a voltage to the gate of the LDMOS device is provided in order to at least partially offset any difference detected in the comparison. The above steps are repeated until the LDMOS device gate voltage remains a substantially constant value, and the bias point is set.
According to another aspect of the invention, an LDMOS device bias point is set each time power is cycled to the LDMOS device.
According to yet another aspect of the invention, continuous temperature correction is provided to the LDMOS device bias point.
According to still another aspect of the invention, a system for setting the bias point of an LDMOS device includes a current sensor to sense the current draw of the LDMOS device. A comparator is provided for comparing the current draw of the LDMOS device to a reference. A digital potentiometer is used for incrementing the gate bias of the LDMOS device in response to the comparator output, and a mechanism is provided for storing the bias point setting of the LDMOS device.
According to another aspect of the invention, the system also includes circuitry for compensating the bias point responsive to temperature changes.
Numerous technical advantages are provided by the invention including increased bias point accuracy, hot carrier and temperature compensation, scalability enabling automatic biasing of multiple LDMOS devices, reduced cost, increased efficiency, and increased useful life of LDMOS devices.
REFERENCES:
patent: 4599577 (1986-07-01), Nollet
patent: 5777518 (1998-07-01), Bailey
patent: 6265943 (2001-07-01), Dening et al.
patent: 6335657 (2002-01-01), Hayase et al.
patent: 6351189 (2002-02-01), Hirvilampi
Bartola Robert
Blair Cynthia
Dixit Nagaraj V.
Choe Henry
Infineon - Technologies AG
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