Automatic integration reset offset subtraction circuit

Details Automatic integration reset offset subtraction circuit Automatic integration reset offset subtraction circuit

2006-04-11

2006-04-11

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

Reexamination Certificate

active

07026853

ABSTRACT:
Techniques for precise removal of offset charge associated with the reset switch of an integration circuit are disclosed. Offset cancellation circuitry includes a single reset offset subtraction circuit and a replica integrator, which is configured identically to the integrators to be offset cancelled. An offset charge is generated by the circuitry and capacitively coupled to the target integrators. This generated offset charge causes voltage at the input node of each target integrator to substantially match the desired starting voltage level of the targeted integration process. Minimal additional space and circuitry is needed. All of the undesired offset charge is cancelled, without canceling any of the desired input current.

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Broesch, J.D. et al., “A Digital Long Pulse Integrator”, pp. 1-4.

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