Communications: directive radio wave systems and devices (e.g. – Return signal controls radar system – Receiver
Reexamination Certificate
1999-08-30
2001-02-20
Sotomayor, John B. (Department: 3662)
Communications: directive radio wave systems and devices (e.g.,
Return signal controls radar system
Receiver
C342S195000
Reexamination Certificate
active
06191725
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of automatic gain control circuits for electromagnetic wave reception systems and, in particular, for systems intended to provide electronic support measures, electronic intelligence and specifically for radar warning receivers that intercept and digitize pulsed radar signals.
BACKGROUND OF THE INVENTION
In general, electromagnetic wave receivers often require an automatic gain control (AGC) to process signals that exhibit large amplitude variations. Digital receiving systems, in particular, require AGC circuitry due to quantization noise and distortion in their analog-to-digital converters (ADCs). This AGC requirement is rather critical in radar intercept receivers. In these receivers, large bandwidths necessitate very high speed sampling to meet the Nyquist criterion which entails a reduced number of effective bits, signal-to-noise-and-distortion (SINAD) ratio and dynamic range. Commercial ADCs sampling at 200 million samples/s, for example, provide 7 effective bits which amounts to a SINAD of 44 dB. Assuming that 14 dB of the SINAD ratio is required for signal detection and processing, this leaves 30 dB of dynamic range. When undersampling is used, i.e. when an ADC samples a signal at an intermediate frequency higher than half its sampling rate, it is typical then for the ADCs to provide only 6 or 5 effective bits. The dynamic range obtained without an AGC, consequently, falls well short of the 60 dB or more required in radar intercept receivers.
A conventional AGC circuit for digital radar intercept receivers has an analog IF input signal applied to a video detector whose output is applied to a track-and-hold circuit that samples-and-holds the amplitude of the signal starting at the leading edge of each pulse as demarked by a leading edge trigger (LET) circuit. This sampled and held amplitude is compared to reference levels in control circuitry which provides a signal to adjust a programmable attenuator in accordance with the level of that amplitude. The analog IF input signal is applied to the programmable attenuator via an analog delay line where the signal is attenuated to a suitable level before being digitized by a sampling ADC. By delaying the pulse in an analog delay line, the fast programmable attenuator has time to settle before the arrival of the delayed pulse. This AGC circuit, as a result, operates on a pulse-by-pulse basis. The sampling ADC circuit is started and stopped by the control circuitry based on the pulse LET, a pulse trailing edge trigger (TET) circuit and the time delay of the analog delay line. The type of conventional AGC circuit is described in more detail in U.S. Pat. No. 5,161,170 by Paul H. Gilbert et al.
The available analog delay lines in the conventional AGC described above is one source of problems associated with that circuit. This results in these AGC circuits being bulky, expensive, unreliable and to require individual trimming or calibration for interoperability between radar intercept receivers. Present analog cable delay lines entail a large and heavy coil of cable for the typical time delays required. Repeaters may be inserted at regular intervals in the cable to reduce signal attenuation but this is at the expense of bulk and reliability.
Available surface acoustic wave (SAW) delay lines have a limited bandwidth, an insertion loss of the order of 30 dB and produce significant signal distortions. These distortions will reduce interoperability between receivers, at least unless the SAW devices are individually trimmed to distort the signal alike which incurs additional costs. The optical delay lines presently available reduce the dynamic range due to limitations of available photo-detectors.
Another drawback of this conventional AGC circuit is that the time delay of the analog delay lines is fixed. If the rise time of a radar pulse exceeds that time delay, for instance, the control circuitry will not detect the true peak of the pulse and may select insufficient attenuation and the pulse upon reaching the ADC may cause an over-range. The same may also happen if the pulse exhibits amplitude variation, whether intentional or unintentional.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a pulse-to-pulse automatic gain control (AGC) circuit for an electromagnetic wave receiver having an adaptive time delay circuit for a received signal pulse.
An automatic gain control (AGC) circuit for an electromagnetic wave receiving system, according to one embodiment of the present invention, comprises an analog IF input connected to inputs of N parallel paths wherein an output of each path is connected to one of N inputs of an output switch; each of the N parallel paths containing a free-running sampling analog-to-digital converter (ADC), an output of each ADC being applied to a digital delay unit having an output forming the output for that path which is connected to one of the N inputs of said output switch, a number of the paths containing a signal amplitude modifier connected to an input of an associated ADC, the signal amplitude modifiers having fixed modification values that are staggered to provide an analog IF input signal to the sampling ADCs where the input to each sampling ADC has a different signal amplitude value; the AGC circuit having a video detector connected to receive the IF input and to provide a video input signal to a track-and-hold circuit, a means to determine the leading edge of each input signal pulse with a leading edge trigger (LET), a means to determine the trailing edge of each input signal pulse by a trailing edge trigger (TET), wherein the LET is connected to the track-and-hold circuit and to control circuitry with the TET being connected to the control circuitry which has a read/write control line connected to each digital delay unit and a gain control line connected to the output switch, the track-and-hold circuit being connected to the control circuitry and samples and holds the amplitude of an input pulse starting at the leading edge as demarked by the LET while IF signals in each input path with staggered amplitude values are digitized by the free-running ADCs and written into an associated digital delay unit, the writing into the delay units being started and stopped by signals from the control circuitry based on a pulse's LET and TET, the control circuitry comparing the sampled-and-held amplitude from the track-and-hold circuit to reference levels once the TET is activated and then selects a path amongst the N paths that produced the largest digitized version of the analog IF pulse without ADC over-range, the control circuitry then setting the switch to a setting that allows the data from the selected path to be read out to provide a leveled digital IF output at an output of the AGC circuit.
REFERENCES:
patent: 3558816 (1971-01-01), Wise
patent: 4129864 (1978-12-01), Carpenter et al.
patent: 4695901 (1987-09-01), Ryan
patent: 4713689 (1987-12-01), Veillard
patent: 4743907 (1988-05-01), Gellekink
patent: 5111202 (1992-05-01), Rivera et al.
patent: 5161170 (1992-11-01), Gilbert et al.
patent: 5410364 (1995-04-01), Karlock
patent: 5481316 (1996-01-01), Patel
patent: 06069816 (1994-03-01), None
Her Majesty the Queen in right of Canada, as represented by Mini
Larson & Taylor PLC
Sotomayor John B.
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