Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
2003-07-09
2004-11-09
Nguyen, Khanh Van (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S134000, C455S234100
Reexamination Certificate
active
06816013
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an automatic gain control (AGC) device, and more particularly to an AGC device without being influenced by leakage current.
2. Description of the Related Art
An automatic gain control (AGC) device generates an output signal with desired amplitude by providing a properly stable gain control voltage for input signals with different amplitudes. Referring to
FIG. 1
, a conventional AGC device
10
includes a variable gain amplifier (VGA)
11
, a top detector
12
, a bottom detector
13
, a substractor
14
, a target setting unit
15
, a comparator
16
, a charge pump
17
, and a capacitor
18
. The control device
10
outputs an output signal Vo from the VGA
11
, which gain is controlled by the gain control voltage Vg. The top detector
12
and the bottom detector
13
detect a top voltage Vt and a bottom voltage Vb of the output signal Vo. The substractor
14
calculates a voltage difference Vd between the top voltage Vt and the bottom voltage Vb, wherein the voltage difference Vd is a peak-to-peak amplitude of the output signal Vo. Thereafter, the comparator
16
compares the voltage difference Vd with a target value Vs and then generates a comparison value which control the charge pump
17
to generate a gain control voltage Vg and holds the voltage by the capacitor
18
. The operation principle is described in the following. When the comparison value is HIGH, the voltage difference Vd is smaller than the target value Vs. At this time, the charge pump
17
charges the capacitor
18
to increase the gain control voltage Vg. In this case, the gain of the VGA
11
increases, the voltage of the output signal Vo is increased, and the voltage difference Vd also is increased accordingly. The operation of the loop lasts until the voltage difference Vd equals to the target value Vs. On the contrary, if the voltage difference Vd is greater than the target value Vs, the charge pump
17
discharges the capacitor
18
to reduce the gain control voltage Vg. Therefore, the gain of the VGA
11
is dropped to decrease the voltage of the output signal Vo, and the voltage difference Vd is also decreased. The operation of the loop lasts until the voltage difference Vd equals to the target value Vs.
The control device
10
utilizes the charge pump
17
to constitute a closed loop and build a optimum gain control voltage on the capacitor
18
to set an optimum gain control. In some occasions (e.g., in a long-time seeking of an optical storage system), the input signal's amplitude to the VGA
11
is un-regular, then, the loop has to be disabled and the gain control voltage Vg then has to be held for a period of time in order to avoid error operations of the AGC device. In this case, the AGC voltage may be dropped due to the leakage current of the capacitor
18
, and the held gain may be changed to cause errors in system operations.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems, an object of the invention is to provide an AGC device, which is free from being influenced by leakage current and capable of holding the gain control voltage for a long time.
To achieve the above-mentioned object, the invention provides an AGC device including a first control loop, a second control loop, and a multiplexer. The first control loop receives an input signal and generates a first AGC voltage accordingly. The second control loop receives the first AGC voltage, registers the first AGC voltage in a digital format, and outputs a second AGC voltage. The multiplexer chooses the first AGC voltage or the second AGC voltage as an AGC voltage according to a holding signal.
The second control loop includes a second comparator, an up/down counter, a digital-to-analog converter (DAC), a hold control unit, and a counting signal generator. The second comparator has a positive terminal for receiving the first AGC voltage and a negative terminal for receiving the second AGC voltage, and outputs a comparison signal. The up/down counter receives a comparison signal as an up/down counting control signal, up-counts when the comparator outputs HIGH, down-counts when the comparator outputs LOW, receives a counting signal as a counting trigger signal for counting, and outputs a count value accordingly. The DAC converts digital data of the count value into the second AGC voltage. The hold control unit generates the hold signal according to a hold command. The counting signal generator receives the hold signal, stops generating the counting signal to hold the result of the counter when the hold signal is LOW and enabled, and restores the counting signal to make the counter count normally when the hold signal is disabled.
Since the second control loop registers the first AGC voltage value in a digital format, only the second AGC voltage has to be output when the AGC voltage has to be held.
REFERENCES:
patent: 5917372 (1999-06-01), Kakura et al.
patent: 6289044 (2001-09-01), Velez et al.
patent: 6297698 (2001-10-01), Callahan, Jr.
Birch & Stewart Kolasch & Birch, LLP
MediaTek Inc.
Nguyen Khanh Van
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