Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation
Reexamination Certificate
2000-12-19
2004-04-27
Vuong, Quochien B. (Department: 2685)
Telecommunications
Receiver or analog modulated signal frequency converter
Local control of receiver operation
C455S234100, C455S241100, C455S247100, C455S250100
Reexamination Certificate
active
06728524
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an automatic gain control circuit, and particularly to an automatic gain control circuit installed in an amplitude control circuit of an input signal, which is used in a multiple phase shift keying system or quadrature amplitude phase modulation system.
2. Description of Related Art
Recently, as digital equipment such as personal computers becomes commonplace, data communications through networks have been implemented greatly. In addition, efficiency of limited frequency bandwidth available has been increased by bringing communications such as television broadcast into practical services utilizing digital communications technique. In such digital communications technique, quadrature amplitude modulation (abbreviated to QAM from now on) is used frequently. The QAM converts digital data into amplitude and phase information using two orthogonal functions such as sine and cosine functions to transmit the data.
FIG. 12
is a vector diagram illustrating a 16-point QAM signal constellation. The 16 QAM provides the in-phase signal and quadrature-phase signal with four values each. In
FIG. 12
, the I axis represents the amplitude of the in-phase component, that of a cosine wave, and the Q axis represents the amplitude of the quadrature component, that of a sine wave. A vector extending from the origin to a coordinate point (called a symbol from now on) denoted by a black point represents a composite vector of the sine wave amplitude and the cosine wave amplitude. Each symbol of the 16 QAM, which represents a discrete signal transmitted at every fixed interval, has 4-bit information.
FIG. 13
is a block diagram showing a configuration of a conventional carrier recovery system (called demodulation system from now on) of a quadrature amplitude modulation wave. In
FIG. 13
, the reference numeral
101
designates a tuner,
102
designates a bandpass filter,
103
designates a variable gain amplifier (also called AGC amplifier below),
104
designates a frequency converter,
105
designates an oscillator,
106
designates an A/D converter and
107
designates a demodulator.
Next, the operation of the conventional demodulation system as shown in
FIG. 13
will be described. The tuner
101
, receiving a modulation wave such as a terrestrial signal, satellite signal or radio frequency signal traveling through a transmission line such as a cable, converts the signal in the transmission bandwidth into a specified frequency from 30 MHz to 50 MHz, referred to as an intermediate frequency. The bandpass filter
102
removes noise outside the bandwidth of the intermediate frequency modulation wave. The AGC amplifier
103
carries out the gain control of the modulation wave from which the noise is removed. The frequency converter
104
mixes the frequency of the modulation wave with the frequency of the signal output from the oscillator
105
to convert the intermediate frequency modulation wave into a low frequency modulation wave. The A/D converter
106
performs the analog-to-digital conversion of the low frequency modulation wave. The demodulator
107
carries out digital processing to demodulate the modulation wave and to detect the transmitted digital data. To maintain the conversion accuracy of the A/D converter
106
in the demodulation system, the average amplitude of the analog signal supplied to the A/D converter
106
must be maintained at a fixed level. To achieve this, the gain of an AGC amplifier installed in the tuner
101
and that of the AGC amplifier
103
are controlled so that the average amplitude of the input signal to the A/D converter
106
is maintained at a constant level. The gain control is carried out using an automatic gain control circuit (called AGC circuit from now on) in the demodulator
107
.
FIG. 14
is a block diagram showing a configuration of a conventional demodulator. In
FIG. 14
, reference numerals
111
and
112
each designates a multiplier,
113
and
114
each designates a lowpass filter, the reference numeral
115
designates a derotator,
116
designates a decoder,
117
designates a phase comparator,
118
designates a loop filter, and
119
designates a numerically controlled oscillator (called NCO from now on). As the lowpass filters
113
and
114
, roll-off filters or root roll-off filters are used that will meet a transfer characteristic required for preventing the intersymbol interference in digital transmission. Generally, such filters are designed in such a fashion that they achieve a raised cosine characteristic to prevent the intersymbol interference when combined with filter characteristics on the transmission side.
Next, the operation of the conventional demodulator as show in
FIG. 14
will be described. It is assumed here that all the processing in the demodulator is carried out digitally, because the modulation wave supplied to the data input terminal of the demodulator is the digital modulation wave passing through the A/D converter
106
. The multipliers
111
and
112
multiple the modulation wave by the local oscillation signals with cosine and sine waveforms output from a fixed frequency local oscillator, thereby separating the input modulation wave into two orthogonal I- and Q-components. The lowpass filters
113
and
114
, having the same frequency characteristic, carry out spectrum shaping of the outputs of the multipliers
111
and
112
. The derotator
115
, which is a complex multiplier, receiving the output signal from the lowpass filters
113
and
114
and data conversion signals with pseudo-sine and pseudo-cosine waveforms from the NCO
119
, corrects the phase deviation and frequency deviation of the input modulation wave. The decoder
116
, receiving the I- and Q-components of the input modulation wave from the derotator
115
, converts the symbol information to bit streams. The phase comparator
117
, receiving the I- and Q-components of the input modulation wave from the derotator
115
, predicts an ideal symbol from the input information, and detects a phase difference between the ideal symbol and the actually-received symbol. The loop filter
118
smoothes the detected phase difference, and supplies the smoothed value to the frequency control terminal of the NCO
119
. The NCO
119
, which generates a signal with a frequency proportional to the input digital signal, has a data conversion function, and outputs the pseudo-sine and pseudo-cosine signals as digital signals. The pseudo-sine and pseudo-cosine signals output from the NCO
119
are supplied to the derotator
115
as information for correcting the phase deviation and frequency deviation of the input modulation wave as described above. When the residual frequency and phase differences are eliminated from the output signals of the derotator
115
, the outputs of the decoder
116
that converts the symbol information to the bit streams conform to the transmitted digital data, thus implementing accurate demodulation.
As described above, the demodulator includes an AGC circuit. The AGC circuit receives the input modulation wave output from the A/D converter
106
, or the I- and Q-components output from the lowpass filters
113
and
114
. The AGC circuit calculates the power of the modulation wave conveying the information of the input signal given as the symbol information, and detects the difference between the power of the actually-input modulation wave and a reference value representing ideal power determined for each modulation scheme by comparing them. The AGC circuit supplies a control signal calculated from the detected power difference to the AGC amplifier in the tuner
101
and to the AGC amplifier
103
after the bandpass filter
102
so that the amplitude of the input signal to the A/D converter is maintained at a fixed value.
FIG. 15
is a block diagram showing a configuration of a conventional AGC circuit. In
FIG. 15
, the reference numeral
121
designates a selector,
122
designates a power calculator,
123
designates a root calculator,
124
designates a
Murakami Syuji
Yamanaka Kazuya
Burns Doane Swecker & Mathis L.L.P.
Renesas Technology Corp.
Vuong Quochien B.
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