Automatic gain control circuit and control method

Details Automatic gain control circuit and control method Automatic gain control circuit and control method

2002-08-08

2003-12-09

Ton, My-Trang Nu (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

Reexamination Certificate

active

06661287

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 91105535, filed Mar. 22, 2002.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to an automatic gain control (AGC) circuit. More particularly, the present invention relates to an automatic gain control circuit using a feedback control to modify the gain factor of a voltage gain amplifier (VGA).
2. Description of Related Art
In analogue signal processing circuits for magnetic or optical disc, the received input signals are often varied due to different pick-up devices or storage mediums. Hence, an automatic gain control circuit is frequently employed to maintain proper output signals for subsequent signal processing. And in order to maintain a proper output signal level, the gain of the automatic gain control circuit needs to be varied according to the received input signal. In other words, the gain is decreased when the input signal level is increased and the gain is increased when the input signal level is reduced.
FIG. 1
is an equivalent circuit diagram of a conventional automatic gain control circuit
100
. As shown in
FIG. 1
, the automatic gain control circuit
100
includes a variable gain amplifier (VGA)
110
, a low-pass filter
120
, an amplifier
130
(having a fixed gain), a full-wave rectifier
140
, a comparator
150
, a charge-pump circuit
160
and a capacitor
170
. Differential input signals V
IA
, V
IB
produce output signals DP, DN after passing through the amplifier circuits and the filtering circuit such as the variable gain amplifier
110
, the low-pass filter
120
and the fixed-gain amplifier
130
. After rectification of the output signals DP, DN by the full-wave rectifier
140
, the rectified signal is passed to the comparator
150
to compare with a required magnitude V
AGCDAC
to produce a compare result signal V
cp
. Utilizing the compare result signal V
cp
, the charge-pump circuit
160
is controlled to charge or discharge the capacitor
170
and vary the potential difference across the capacitor
170
so that the gain of the variable gain amplifier
110
can be adjusted. When the amplitude of the output signals DP, DN is greater than the required magnitude V
AGCDAC
, the comparator
150
outputs a high level compare result signal V
CP
to control the current I
attack
within the charge-pump circuit
160
and charge up the capacitor
170
. Hence, reducing the gain of the variable gain amplifier
110
. On the other hand, when the amplitude of the output signals DP, DN is smaller than the magnitude V
AGCDAC
, the comparator
150
outputs a low level compare result signal V
CP
to control the current I
decay
within the charge-pump circuit and discharge the capacitor
170
. Ultimately, the gain of the variable gain amplifier
110
is increased. Nevertheless, this type of automatic gain control circuit is limited by the bandwidth of the full-wave rectifier
140
. When the input signals contain high frequency components, a full-wave rectifier having a bandwidth wide enough to accommodate the high frequency components of the signals is difficult to implement. In addition, the gain of a full-wave rectifier also affects precision of the entire circuit.
FIG. 2
is an equivalent circuit diagram of another conventional automatic gain control circuit. As shown in
FIG. 2
, the automatic gain control circuit
200
includes a variable gain amplifier
210
, a low-pass filter
220
, a fixed-gain amplifier
230
, a pair of programmable level shifters (
240
,
260
), a pair of comparators
250
,
270
, an OR-gate
280
, a charge-pump circuit
290
and a capacitor
295
. The principle of operation is very similar to the automatic gain control circuit shown in
FIG. 1
except with an improvement over the bandwidth limitation of the full-wave rectifier
140
of FIG.
1
. The full-wave rectifier
140
and the comparator
150
for generating the compare result signal V
CP
in
FIG. 1
are replaced by the programmable level shifters
240
,
260
, the comparators
250
,
270
and the OR-gate
280
in FIG.
2
. Here, only the operation of the programmable level shifter
240
the comparator
250
is illustrated with reference to
FIGS. 3 and 4
.
FIG. 3
is a graph showing the waveforms of the output signals DP, DN and a shifted output signal DNS after the output signal DN passes through the programmable level shifter
240
to shift by an amount of Vs.
FIG. 4
is a graph showing the waveform of a first compare result signal V
COMP1
after passing the shifted output
15
signal DNS into the comparator
250
to compare with the output signal DP. When the amplitude of the output signals DP, DN is large, the comparators
250
,
270
will output high level first and second compare result signals V
COMP1
and V
COMP2
respectively. According to the first and the second compare result signals V
COMP1
and V
COMP2
, the OR-gate produces a compare result signal V
CP
to control the current I
attack
of the charge-pump circuit
290
to charge the capacitor
295
. Hence, reducing the gain of the variable gain amplifier
210
. On the other hand, when the amplitude of the output signals DP, DN is too small, the comparators
250
,
270
output low level first and second compare result signals V
COMP1
and V
COMP2
. According to the first and the second compare result signals V
COMP1
, and V
COMP2
, the OR-gate produces a compare result signal V
CP
to control the current I
decay
of the charge-pump circuit
290
to discharge the capacitor
295
. Ultimately, the gain of the variable gain amplifier
210
is increased.
However, the automatic gain control circuit
200
in
FIG. 2
still contains the following drawbacks:
1. The programmable level shifters may lead to a phase difference between differential signals, thereby affecting processing precision.
2. The programmable level shifters increase the loading along the signal path so that bandwidth of the automatic gain control circuit is reduced.
3. If the output signals have large amplitudes, programmable level shifters having a large output range and wide bandwidth are required and hence difficult to implement with low voltage circuits.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide an automatic gain control circuit and control method that not only increases the bandwidth of the automatic gain control circuit, but also permits its implementation using low voltage circuits.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, the invention provides an automatic gain control circuit capable of controlling its gain according to incoming reference signals. The gain control circuit includes a variable gain amplifier, a filtering circuit and a peak value inspection circuit. The variable gain amplifier receives differential input signals and amplifies the differential input signals by the gain to produce an amplified signal. The magnitude of the gain can be varied. The filtering circuit receives the amplified signal and produces differential output signals after filtering. The peak value inspection circuit receives the differential output signals and compares with a reference signal differentially to produce a control signal. The gain of the variable gain amplifier is controlled by the control signal.
In one embodiment of the present invention, the peak value inspection circuit includes a non-inverted phase differential comparator and an inverted phase differential comparator, an OR-gate and a charge/discharge circuit. The non-inverted phase differential comparator performs a differential comparison between the differential output signals and the reference signal to produce a non-inverted compare result signal. The inverted phase differential comparator performs a differential comparison between the inverted differential output signals and the reference signal to produce an inverted compare result signal. The OR-gate performs a logic operation between the non-inverted c

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