Automatic gain control circuit

Details Automatic gain control circuit Automatic gain control circuit

2005-12-19

2009-12-29

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

Reexamination Certificate

active

07639085

ABSTRACT:
A first MOS transistor (M1) and a second MOS transistor (M2) constitute a cascode amplifier. The second MOS transistor (M2) is in a differential connection with a gain control MOS transistor (M4), which has its gate supplied with an AGC control voltage (VAGC), and it is arranged that the device area ratio of the second MOS transistor (M2) to the gain control MOS transistor (M4) is one to N (where N≧1). In this way, even in a region where the AGC control voltage (VAGC) is small, abrupt variations of the gain can be suppressed, while the drain current of the first MOS transistor (M1) can be kept constant independently of the gain control.

REFERENCES:
patent: 6046640 (2000-04-01), Brunner
patent: 7072427 (2006-07-01), Rawlins et al.
patent: 2002/0067213 (2002-06-01), Miyabe et al.
patent: 57-011512 (1982-01-01), None
patent: 57-208718 (1982-12-01), None
patent: WO-03/028210 (2003-04-01), None

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