Automatic gain control amplifier left at an optimum gain after a

Amplifiers – With control of power supply or bias voltage – With control of input electrode or gain control electrode bias

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330278, H03G 320

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active

044892810

ABSTRACT:
In an automatic gain control amplifier circuit for an intermittent sequence of digital input signals, a signal detector detects presence and absence of the digital input signal in the sequence to produce a presence signal which takes a presence and an absence level when the digital input signal is present and absent, respectively. The presence signal takes the absence level even upon undesired occurrence of an interruption in one of the digital input signals. A level comparator compares an amplified level of a digital output signal of the amplifier circuit with a reference level, which is preferably equal to an optimum level common to the digital output signals, to produce a comparison result signal which takes a first and a second level when the amplified level is higher and lower than the reference level, respectively. An up-down counter is preset to a predetermined count upon switch on of a power source for the amplifier circuit and is enabled by the presence level to count up and down clocks of the digital input signal from the predetermined count when the comparison result signal takes one and the other of the first and the second levels, respectively. A gain control signal is produced in consideration of the count in the up-down counter.

REFERENCES:
patent: 3969683 (1976-07-01), Fabricius
patent: 4360787 (1982-11-01), Galpin
Kerdock, R. S., et al., "Results of the Atlanta Experiments", Bell System Tech. J., vol. 57, No. 6, Jul.-Aug. 1978, pp. 1857-1879.

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