Pulse or digital communications – Equalizers – Automatic
Reexamination Certificate
1998-07-22
2002-04-02
Corrielus, Jean (Department: 2631)
Pulse or digital communications
Equalizers
Automatic
Reexamination Certificate
active
06366612
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an automatic equalizer, and more particularly to an automatic equalizer that automatically equalizes signals distorted due to intersymbol interference.
Conventionally, there has been a decision feedback-type automatic equalizer as an automatic equalizer. In some decision feedback-type automatic equalizers, as shown in the flowchart of
FIG. 11
, the absolute values of impulse response signals are obtained (refer to the step
201
) and then an impulse response with the largest power is decided as a demodulation point (refer to the step
1001
). Thus received signals are equalized by calculating estimated received signals using both decision outputs for a postcursor component and transmission signal sequences for a precursor component. Then the filter coefficients are decided such that the demodulation point corresponds to an impulse response with the largest power.
However, when such an automatic equalizer estimates a received signal Sr with a relatively large precursor component, wrong selection of a sequence candidate due to noises occurs easily, thus resulting in degradation in quality. The reason is that there is no noticeable difference between estimated precursor values even if the corresponding symbols are interchanged when the magnitude of the precursor component is close to that of the component corresponding to a demodulation point.
SUMMARY OF THE INVENTION
The objective of the present invention is to solve the above-mentioned problem.
Moreover, the objective of the invention is to provide an automatic equalizer that can perform high-quality signal equalization.
Furthermore, the objective of the present invention is to provide an automatic equalizer that.
The objective of the present invention is achieved by an automatic equalizer comprising a decision unit for subjecting N estimated received signals to a receive code decision and then outputting a decision result as a decision output signal; an impulse response calculation circuit for outputting impulse response signals in response to received signals; a demodulation point setting circuit for outputting a demodulation point setting signal in response to the impulse response signals, the demodulation point setting signal shifting a demodulation point from a point where the absolute value of the impulse response signal is maximized; a filter coefficient output circuit for outputting a first filter coefficient group and a second filter coefficient group in response to the impulse response signals and the demodulation point setting signal, the first filter coefficient group corresponding to a postcursor component in the impulse response signals, the second filter coefficient group corresponding to a precursor component in the impulse response signals; a transversal filter for estimating the postcursor component of the received signal in response to the decision output signals and the first filter coefficient group to output a estimated postcursor signal; a transmission signal sequence generator for producing N transmission signal sequences; a estimated precursor circuit for estimating a precursor component of the received signal in response to the second filter coefficient group and the N transmission signal sequences and then outputting N estimated precursor signals; and an adder for adding said estimated postcursor signal and each of the N estimated precursor signals to output said N estimated received signals.
In the automatic equalizer according to the present invention, the decision circuit comprises a subtracter for providing differences between the received signal and the N estimated received signals to output N estimation error signals; and a minimum error decision unit for outputting as a decision output signal a part of a transmission signal sequence corresponding to an estimated received signal with a minimum absolute value among the N estimated received signals.
In the automatic equalizer according to the present invention, the demodulation point setting circuit comprises means for outputting as a response absolute value signal the absolute value signal of the impulse response signal; means for determining as a candidate signal the response absolute value signal with a larger absolute value than a threshold value; and means for selecting as a demodulation point a point corresponding to a candidate signal with the smallest propagation delay among the candidate signals to decide the demodulation point setting signal.
In the automatic equalizer according to the present invention, the demodulation point setting circuit comprises means for outputting as a response absolute value signal the absolute value of the impulse response signal; means for selecting as a demodulation point candidate signal a signal with the largest absolute value among response absolute value signals; means for outputting a weighted demodulation point candidate signal by multiplying the demodulation point candidate signal by a first weight coefficient; means for outputting a weighted selected response absolute value signal by multiplying the response absolute value signal with a smaller propagation delay than the propagation delay of the demodulation point candidate signal by a second weight coefficient; and means for comparing the weighted demodulation point candidate signal with the weighted selected response absolute value signal, and then for deciding the demodulation point setting signal being a point corresponding to the demodulation point candidate select signal when the weighted demodulation point candidate signal is larger than all of the weighted selected response absolute value signals and for updating the demodulation point candidate signal to a response absolute value signal with the propagation delay next larger than that of the demodulation point signal when the weighted demodulation point candidate signal is smaller than all of the weighted selected response absolute value signals; wherein the demodulation point setting signal is recursively decided.
In the automatic equalizer according to the present invention, the demodulation point setting circuit comprises means for outputting as a response absolute value signal the absolute value signal of the impulse response signal; means for selecting as a demodulation point candidate signal a signal with the largest absolute value among response absolute value signals; means for outputting a weighted demodulation point candidate signal by multiplying the demodulation point candidate signal by a first weight coefficient; means for outputting a weighted selected response absolute value signal by multiplying the selected response absolute value signal by a second weight coefficient, the number of the selected response absolute value signal equals to a value obtained by subtracting 1 from the number of taps of the estimated precursor circuit and the selected response absolute signals are larger propagation delay among the response absolute value signals with a smaller propagation delay than that of the demodulation point candidate signal; and means for comparing the weighted demodulation point candidate signal with the weighted select response absolute value signal, and then for deciding the demodulation point setting signal being a point corresponding to the demodulation point candidate select signal when the weighted demodulation point candidate signal is larger than all of the weighted selected response absolute value signals and for updating the demodulation point candidate signal to a response absolute value signal with the propagation delay next larger than that of the demodulation point signal when the weighted demodulation point candidate signal is smaller than all of the weighted selected response absolute value signals; wherein the demodulation point setting signal is recursively decided.
In the automatic equalizer according to the present invention, the demodulation point setting circuit comprises means for outputting as a response absolute value signal the absolute value signal of the impulse response signal; means
Kakura Yoshikazu
Osawa Tomoki
Corrielus Jean
NEC Corporation
Ostrolenk Faber Gerb & Soffen, LLP
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