Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1998-09-30
2001-12-04
Jankus, Almis R. (Department: 2674)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S212000, C345S204000, C345S698000, C345S699000, C345S673000, C327S141000, C327S144000, C327S145000
Reexamination Certificate
active
06326961
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an automatic detection method of digital display for measuring the phase and frequency of a pixel clock and an automatic detection apparatus using the method.
2. Description of Related Art
Display is the most important peripheral of personal computer (PC) and shows image frames through display interface card of PC. Based on the pixel clock of PC's display interface card, the analog red, blue, and green light signal sequence of the image frames pixels are serially sent to an analog display for showing text or graphic information. In general, the displaying clock of analog display must be synchronized with the pixel clock of display interface card by using a phase-lock loop (PLL). The display interface card does not provide the pixel clock to the display, and the synchronization of both clocks is hence not easily achieved. The parameters of PLL for synchronization are usually tuned manually according to experience of user or assembly person, and this object is very laborious and difficult. Recently, an automatic detection apparatus for measuring the phase and frequency of analog display had been provided. The apparatus captures and transfers the image of display with a video camera to electric signals, and then transmits these signals to the adjusting unit thereof through a RS232 bus. The adjusting unit of apparatus tunes the displaying clock's phase and frequency of PC display according to the captured image. The drawback of automatic detection apparatus of prior art is that its tuning accuracy and range are lower.
Today, PC displays are digitized. An image frame of digital display consists of a great number of pixels. Based on a pixel clock, the display interface card of a PC serially sends the pixel signals of image frames to a digital display. Based on a displaying clock consisting of a series of sampling instants, the digital display samples the signal sequence of image frame's pixels from the display interface card at each sampling instant. Hence, the above-mentioned displaying clock is usually also called the sampling clock of digital display. If the frequency or phase of displaying clock and the pixel clock are not matched, a signal at a pixel may be displayed at another pixel of digital display. Hence, the image shown by digital display will be distorted, unstable or ambiguous. As shown in FIG.
1
and
FIG. 2
, the sampling clock
104
of digital display and the pixel clock
102
of PC's display interface card have the same phase and frequency. The frequency or phase of displaying clock
104
is faster than the pixel clock
101
of PC's display interface card, and the frequency or phase of displaying clock
104
is slower than the pixel clock
103
of PC's display interface card. It is obvious that the frequency or phase of both pixel clocks
101
and
102
, and the sampling clock
104
are not exactly matched. Hence, the image shown by digital display will be unstable, distorted or ambiguous.
SUMMARY OF THE INVENTION
The objective of the invention is to provide an automatic detection method for the displaying clock of digital display to measure the phase and frequency of a pixel clock for synchronization, i.e., to make the frequencies and phases of displaying clock and the pixel clock matched. Based on the synchronized displaying clock, the image shown by digital display will be stable and bright in color.
The other objective of the present invention is to provide an automatic detection apparatus, using the automatic detection method of the invention, for tuning the phase and frequency of the displaying clock of digital display. The automatic detection apparatus of invention includes a clock generation unit, a sampling unit, a data processing unit, an accumulation unit, and a decision unit. The clock generation unit creates a plurality of sampling clocks. According to these sampling packet sequences, the sampling unit samples and holds the pixel signals of image frames based on the pixel clock of display interface card, and then stores these sampled data in its registers. The data processing unit calculates and transmits the differences of sampled data based on every sampling clock to the accumulation unit. The accumulation unit accumulates these differences based on every sampling clock, and transmits the sums of these differences based on every sampling clock to the decision unit. According to the transmitted sums based on these different sampling clocks, the decision unit finds out the sampling clock with the smallest transmitted sum, and let the phase and frequency of sampling clock with the smallest summed value as those of the displaying clock of PC display.
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Hwang Chao-Ching
Lin Ming-Yen
Lin Shih-Yin
CTX Opto-Electronics Corp.
Hsu Winston
Jankus Almis R.
Tran Henry N.
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